Move even more functionality from MRegisterInfo into TargetInstrInfo.

Some day I'll get it all moved over...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45672 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp
index c7cbd9b..e9b263f 100644
--- a/lib/Target/CellSPU/SPUInstrInfo.cpp
+++ b/lib/Target/CellSPU/SPUInstrInfo.cpp
@@ -388,3 +388,42 @@
   }
 }
 
+/// foldMemoryOperand - SPU, like PPC, can only fold spills into
+/// copy instructions, turning them into load/store instructions.
+MachineInstr *
+SPUInstrInfo::foldMemoryOperand(MachineInstr *MI,
+                                   SmallVectorImpl<unsigned> &Ops,
+                                   int FrameIndex) const
+{
+#if SOMEDAY_SCOTT_LOOKS_AT_ME_AGAIN
+  if (Ops.size() != 1) return NULL;
+
+  unsigned OpNum = Ops[0];
+  unsigned Opc = MI->getOpcode();
+  MachineInstr *NewMI = 0;
+  
+  if ((Opc == SPU::ORr32
+       || Opc == SPU::ORv4i32)
+       && MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) {
+    if (OpNum == 0) {  // move -> store
+      unsigned InReg = MI->getOperand(1).getReg();
+      if (FrameIndex < SPUFrameInfo::maxFrameOffset()) {
+	NewMI = addFrameReference(BuildMI(TII.get(SPU::STQDr32)).addReg(InReg),
+				  FrameIndex);
+      }
+    } else {           // move -> load
+      unsigned OutReg = MI->getOperand(0).getReg();
+      Opc = (FrameIndex < SPUFrameInfo::maxFrameOffset()) ? SPU::STQDr32 : SPU::STQXr32;
+      NewMI = addFrameReference(BuildMI(TII.get(Opc), OutReg), FrameIndex);
+    }
+  }
+
+  if (NewMI)
+    NewMI->copyKillDeadInfo(MI);
+
+  return NewMI;
+#else
+  return 0;
+#endif
+}
+
diff --git a/lib/Target/CellSPU/SPUInstrInfo.h b/lib/Target/CellSPU/SPUInstrInfo.h
index 22581fc..e2ecf9b 100644
--- a/lib/Target/CellSPU/SPUInstrInfo.h
+++ b/lib/Target/CellSPU/SPUInstrInfo.h
@@ -74,7 +74,19 @@
     virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
 				                         SmallVectorImpl<MachineOperand> &Addr,
 				                         const TargetRegisterClass *RC,
-				                         SmallVectorImpl<MachineInstr*> &NewMIs) const;
+                                 SmallVectorImpl<MachineInstr*> &NewMIs) const;
+    
+    //! Fold spills into load/store instructions
+    virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
+                                            SmallVectorImpl<unsigned> &Ops,
+                                            int FrameIndex) const;
+
+    //! Fold any load/store to an operand
+    virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
+                                            SmallVectorImpl<unsigned> &Ops,
+                                            MachineInstr* LoadMI) const {
+      return 0;
+    }
   };
 }
 
diff --git a/lib/Target/CellSPU/SPURegisterInfo.cpp b/lib/Target/CellSPU/SPURegisterInfo.cpp
index 3a0565d..90606cb 100644
--- a/lib/Target/CellSPU/SPURegisterInfo.cpp
+++ b/lib/Target/CellSPU/SPURegisterInfo.cpp
@@ -295,54 +295,6 @@
   return Reserved;
 }
 
-/// foldMemoryOperand - SPU, like PPC, can only fold spills into
-/// copy instructions, turning them into load/store instructions.
-MachineInstr *
-SPURegisterInfo::foldMemoryOperand(MachineInstr *MI,
-                                   SmallVectorImpl<unsigned> &Ops,
-                                   int FrameIndex) const
-{
-#if SOMEDAY_SCOTT_LOOKS_AT_ME_AGAIN
-  if (Ops.size() != 1) return NULL;
-
-  unsigned OpNum = Ops[0];
-  unsigned Opc = MI->getOpcode();
-  MachineInstr *NewMI = 0;
-  
-  if ((Opc == SPU::ORr32
-       || Opc == SPU::ORv4i32)
-       && MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) {
-    if (OpNum == 0) {  // move -> store
-      unsigned InReg = MI->getOperand(1).getReg();
-      if (FrameIndex < SPUFrameInfo::maxFrameOffset()) {
-	NewMI = addFrameReference(BuildMI(TII.get(SPU::STQDr32)).addReg(InReg),
-				  FrameIndex);
-      }
-    } else {           // move -> load
-      unsigned OutReg = MI->getOperand(0).getReg();
-      Opc = (FrameIndex < SPUFrameInfo::maxFrameOffset()) ? SPU::STQDr32 : SPU::STQXr32;
-      NewMI = addFrameReference(BuildMI(TII.get(Opc), OutReg), FrameIndex);
-    }
-  }
-
-  if (NewMI)
-    NewMI->copyKillDeadInfo(MI);
-
-  return NewMI;
-#else
-  return 0;
-#endif
-}
-
-/// General-purpose load/store fold to operand code
-MachineInstr *
-SPURegisterInfo::foldMemoryOperand(MachineInstr *MI,
-                                   SmallVectorImpl<unsigned> &Ops,
-                                   MachineInstr *LoadMI) const
-{
-  return 0;
-}
-
 //===----------------------------------------------------------------------===//
 // Stack Frame Processing methods
 //===----------------------------------------------------------------------===//
diff --git a/lib/Target/CellSPU/SPURegisterInfo.h b/lib/Target/CellSPU/SPURegisterInfo.h
index c5df762..b806e80 100644
--- a/lib/Target/CellSPU/SPURegisterInfo.h
+++ b/lib/Target/CellSPU/SPURegisterInfo.h
@@ -42,16 +42,6 @@
 
     void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
 		       unsigned DestReg, const MachineInstr *Orig) const;
-
-    //! Fold spills into load/store instructions
-    virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
-                                            SmallVectorImpl<unsigned> &Ops,
-                                            int FrameIndex) const;
-
-    //! Fold any load/store to an operand
-    virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
-                                            SmallVectorImpl<unsigned> &Ops,
-                                            MachineInstr* LoadMI) const;
     
     //! Return the array of callee-saved registers
     virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const;