This target doesn't support fabs/fneg yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21010 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp
index ba5178b..7242f8f 100644
--- a/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -75,6 +75,10 @@
setOperationAction(ISD::MEMSET , MVT::Other, Expand);
setOperationAction(ISD::MEMCPY , MVT::Other, Expand);
+ // We don't support these yet.
+ setOperationAction(ISD::FNEG , MVT::f64 , Expand);
+ setOperationAction(ISD::FABS , MVT::f64 , Expand);
+
//Doesn't work yet
setOperationAction(ISD::SETCC , MVT::f32, Promote);