Fix addrmode1 instruction encodings; fix bx_ret encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56277 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index cd79722..e97548e 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -260,8 +260,8 @@
     break;
   }
   case ARMII::BranchMisc: {
-    // Set bit[19:8] to 0xFFF
-    Binary |= 0xfff << 8;
+    if (TID.Opcode == ARM::BX)
+      abort(); // FIXME
     if (TID.Opcode == ARM::BX_RET)
       Binary |= 0xe; // the return register is LR
     else