Const-ify several TargetInstrInfo methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57622 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index d2e2cf1..e105b0f 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -1543,7 +1543,7 @@
}
static const MachineInstrBuilder &X86InstrAddOperand(MachineInstrBuilder &MIB,
- MachineOperand &MO) {
+ const MachineOperand &MO) {
if (MO.isReg())
MIB = MIB.addReg(MO.getReg(), MO.isDef(), MO.isImplicit(),
MO.isKill(), MO.isDead(), MO.getSubReg());
@@ -1872,7 +1872,7 @@
}
static MachineInstr *FuseTwoAddrInst(MachineFunction &MF, unsigned Opcode,
- SmallVector<MachineOperand,4> &MOs,
+ const SmallVector<MachineOperand,4> &MOs,
MachineInstr *MI, const TargetInstrInfo &TII) {
// Create the base instruction with the memory operand as the first part.
MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), true);
@@ -1898,7 +1898,7 @@
static MachineInstr *FuseInst(MachineFunction &MF,
unsigned Opcode, unsigned OpNo,
- SmallVector<MachineOperand,4> &MOs,
+ const SmallVector<MachineOperand,4> &MOs,
MachineInstr *MI, const TargetInstrInfo &TII) {
MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), true);
MachineInstrBuilder MIB(NewMI);
@@ -1920,7 +1920,7 @@
}
static MachineInstr *MakeM0Inst(const TargetInstrInfo &TII, unsigned Opcode,
- SmallVector<MachineOperand,4> &MOs,
+ const SmallVector<MachineOperand,4> &MOs,
MachineInstr *MI) {
MachineFunction &MF = *MI->getParent()->getParent();
MachineInstrBuilder MIB = BuildMI(MF, TII.get(Opcode));
@@ -1936,7 +1936,7 @@
MachineInstr*
X86InstrInfo::foldMemoryOperand(MachineFunction &MF,
MachineInstr *MI, unsigned i,
- SmallVector<MachineOperand,4> &MOs) const {
+ const SmallVector<MachineOperand,4> &MOs) const{
const DenseMap<unsigned*, unsigned> *OpcodeTablePtr = NULL;
bool isTwoAddrFold = false;
unsigned NumOps = MI->getDesc().getNumOperands();
@@ -1995,7 +1995,7 @@
MachineInstr* X86InstrInfo::foldMemoryOperand(MachineFunction &MF,
MachineInstr *MI,
- SmallVectorImpl<unsigned> &Ops,
+ const SmallVectorImpl<unsigned> &Ops,
int FrameIndex) const {
// Check switch flag
if (NoFusing) return NULL;
@@ -2042,7 +2042,7 @@
MachineInstr* X86InstrInfo::foldMemoryOperand(MachineFunction &MF,
MachineInstr *MI,
- SmallVectorImpl<unsigned> &Ops,
+ const SmallVectorImpl<unsigned> &Ops,
MachineInstr *LoadMI) const {
// Check switch flag
if (NoFusing) return NULL;
@@ -2093,8 +2093,8 @@
}
-bool X86InstrInfo::canFoldMemoryOperand(MachineInstr *MI,
- SmallVectorImpl<unsigned> &Ops) const {
+bool X86InstrInfo::canFoldMemoryOperand(const MachineInstr *MI,
+ const SmallVectorImpl<unsigned> &Ops) const {
// Check switch flag
if (NoFusing) return 0;
@@ -2350,7 +2350,7 @@
return I->second.first;
}
-bool X86InstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const {
+bool X86InstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
if (MBB.empty()) return false;
switch (MBB.back().getOpcode()) {
diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h
index 1413310..5edc19d 100644
--- a/lib/Target/X86/X86InstrInfo.h
+++ b/lib/Target/X86/X86InstrInfo.h
@@ -359,7 +359,7 @@
/// references has been changed.
virtual MachineInstr* foldMemoryOperand(MachineFunction &MF,
MachineInstr* MI,
- SmallVectorImpl<unsigned> &Ops,
+ const SmallVectorImpl<unsigned> &Ops,
int FrameIndex) const;
/// foldMemoryOperand - Same as the previous version except it allows folding
@@ -367,12 +367,13 @@
/// stack slot.
virtual MachineInstr* foldMemoryOperand(MachineFunction &MF,
MachineInstr* MI,
- SmallVectorImpl<unsigned> &Ops,
+ const SmallVectorImpl<unsigned> &Ops,
MachineInstr* LoadMI) const;
/// canFoldMemoryOperand - Returns true if the specified load / store is
/// folding is possible.
- virtual bool canFoldMemoryOperand(MachineInstr*, SmallVectorImpl<unsigned> &) const;
+ virtual bool canFoldMemoryOperand(const MachineInstr*,
+ const SmallVectorImpl<unsigned> &) const;
/// unfoldMemoryOperand - Separate a single instruction which folded a load or
/// a store or a load and a store into two or more instruction. If this is
@@ -391,7 +392,7 @@
virtual unsigned getOpcodeAfterMemoryUnfold(unsigned Opc,
bool UnfoldLoad, bool UnfoldStore) const;
- virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const;
+ virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
virtual
bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
@@ -431,7 +432,7 @@
MachineInstr* foldMemoryOperand(MachineFunction &MF,
MachineInstr* MI,
unsigned OpNum,
- SmallVector<MachineOperand,4> &MOs) const;
+ const SmallVector<MachineOperand,4> &MOs) const;
};
} // End llvm namespace