disallow direct access to SDValue::ResNo, provide a getter instead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55394 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index d26a5fb..498729f 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -733,7 +733,7 @@
InFlag = SDValue(ResNode, 1);
ReplaceUses(SDValue(Op.Val, 1), InFlag);
}
- ReplaceUses(SDValue(Op.Val, 0), SDValue(Chain.Val, Chain.ResNo));
+ ReplaceUses(SDValue(Op.Val, 0), SDValue(Chain.Val, Chain.getResNo()));
return NULL;
}
case ARMISD::CMOV: {
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index c696832..c853a32 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -646,7 +646,7 @@
ResultVals.push_back(Chain);
SDValue Res = DAG.getMergeValues(&ResultVals[0], ResultVals.size());
- return Res.getValue(Op.ResNo);
+ return Res.getValue(Op.getResNo());
}
static SDValue LowerRET(SDValue Op, SelectionDAG &DAG) {
diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp
index 5f621ed..4baaded 100644
--- a/lib/Target/CellSPU/SPUISelLowering.cpp
+++ b/lib/Target/CellSPU/SPUISelLowering.cpp
@@ -1292,7 +1292,7 @@
// Otherwise, merge everything together with a MERGE_VALUES node.
ResultVals[NumResults++] = Chain;
SDValue Res = DAG.getMergeValues(ResultVals, NumResults);
- return Res.getValue(Op.ResNo);
+ return Res.getValue(Op.getResNo());
}
static SDValue
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index a364f7c..d74ec0d 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -750,7 +750,7 @@
// Handle result values, copying them out of physregs into vregs that we
// return.
- return SDValue(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.ResNo);
+ return SDValue(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.getResNo());
}
/// LowerCallResult - Lower the result values of an ISD::CALL into the
@@ -926,7 +926,7 @@
// Return the new list of results.
return DAG.getMergeValues(Op.Val->getVTList(), &ArgValues[0],
- ArgValues.size()).getValue(Op.ResNo);
+ ArgValues.size()).getValue(Op.getResNo());
}
//===----------------------------------------------------------------------===//
diff --git a/lib/Target/PIC16/PIC16ISelLowering.cpp b/lib/Target/PIC16/PIC16ISelLowering.cpp
index fe22f2e..f067747 100644
--- a/lib/Target/PIC16/PIC16ISelLowering.cpp
+++ b/lib/Target/PIC16/PIC16ISelLowering.cpp
@@ -544,7 +544,7 @@
ArgValues.push_back(Root);
return DAG.getMergeValues(Op.Val->getVTList(), &ArgValues[0],
- ArgValues.size()).getValue(Op.ResNo);
+ ArgValues.size()).getValue(Op.getResNo());
}
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 1908a05..fc83998 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -2511,7 +2511,7 @@
"Flag must be set. Depend on flag being set in LowerRET");
Chain = DAG.getNode(PPCISD::TAILCALL,
Op.Val->getVTList(), &Ops[0], Ops.size());
- return SDValue(Chain.Val, Op.ResNo);
+ return SDValue(Chain.Val, Op.getResNo());
}
Chain = DAG.getNode(CallOpc, NodeTys, &Ops[0], Ops.size());
@@ -2548,7 +2548,7 @@
ResultVals.push_back(Chain);
SDValue Res = DAG.getMergeValues(Op.Val->getVTList(), &ResultVals[0],
ResultVals.size());
- return Res.getValue(Op.ResNo);
+ return Res.getValue(Op.getResNo());
}
SDValue PPCTargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG,
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index 3f9b1c2..7718ea9 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -253,7 +253,7 @@
SDNode *User = *I;
for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) {
SDValue Op = User->getOperand(i);
- if (Op.Val == N && Op.ResNo == FlagResNo)
+ if (Op.Val == N && Op.getResNo() == FlagResNo)
return User;
}
}
@@ -888,7 +888,7 @@
case ISD::SMUL_LOHI:
case ISD::UMUL_LOHI:
// A mul_lohi where we need the low part can be folded as a plain multiply.
- if (N.ResNo != 0) break;
+ if (N.getResNo() != 0) break;
// FALL THROUGH
case ISD::MUL:
// X*[3,5,9] -> X+X*[2,4,8]
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 0477c27..9cc1bed 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -1396,7 +1396,7 @@
// Return the new list of results.
return DAG.getMergeValues(Op.Val->getVTList(), &ArgValues[0],
- ArgValues.size()).getValue(Op.ResNo);
+ ArgValues.size()).getValue(Op.getResNo());
}
SDValue
@@ -1760,7 +1760,7 @@
Chain = DAG.getNode(X86ISD::TAILCALL,
Op.Val->getVTList(), &Ops[0], Ops.size());
- return SDValue(Chain.Val, Op.ResNo);
+ return SDValue(Chain.Val, Op.getResNo());
}
Chain = DAG.getNode(X86ISD::CALL, NodeTys, &Ops[0], Ops.size());
@@ -1787,7 +1787,7 @@
// Handle result values, copying them out of physregs into vregs that we
// return.
- return SDValue(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.ResNo);
+ return SDValue(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.getResNo());
}