commit 48b0133b8393ca3ff09bc1c55250eb11d4bcaf04
author Chris Lattner <sabre@nondot.org> Sun Dec 16 20:26:54 2007 +0000
committer Chris Lattner <sabre@nondot.org> Sun Dec 16 20:26:54 2007 +0000
tree 2b76d9f71f384ee3669cd17c6ee552ed7879041d
parent d7610e16fc1490f2a3a16a68f5059fd34196fbc9

fix a questionable cast, thanks to Mike Stump for pointing this out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45075 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index ed1df4d..79aaaeb 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -5302,7 +5302,7 @@
     Disp = DAG.getNode(ISD::SUB, MVT::i32, FPtr, Addr);
 
     unsigned char MOV32ri = TII->getBaseOpcodeFor(X86::MOV32ri);
-    unsigned char N86Reg  = ((X86RegisterInfo&)RegInfo).getX86RegNum(NestReg);
+    unsigned char N86Reg  = ((X86RegisterInfo*)RegInfo)->getX86RegNum(NestReg);
     OutChains[0] = DAG.getStore(Root, DAG.getConstant(MOV32ri|N86Reg, MVT::i8),
                                 Trmp, TrmpSV->getValue(), TrmpSV->getOffset());