commit 48d0c163fb60f7da7ef3657df242bf11dbdb0617
author Jakob Stoklund Olesen <stoklund@2pi.dk> Tue May 25 17:21:04 2010 +0000
committer Jakob Stoklund Olesen <stoklund@2pi.dk> Tue May 25 17:21:04 2010 +0000
tree 359d7fa330d379d973b2d6cd207109d374d6af12
parent c159fba712292f9a3de4f6841dbd6a3f3cefb2d2

Ignore NumberHack and give each SubRegIndex instance a unique enum value instead.

This passes lit tests, but I'll give it a go through the buildbots to smoke out
any remaining places that depend on the old SubRegIndex numbering.

Then I'll remove NumberHack entirely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104615 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86RegisterInfo.cpp

diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 028d2a4..d5a2835 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -158,7 +158,7 @@
   switch (SubIdx) {
   default: return 0;
   case X86::sub_8bit:
-  //case X86::sub_ss:
+  case X86::sub_ss:
     if (B == &X86::GR8RegClass) {
       if (A->getSize() == 2 || A->getSize() == 4 || A->getSize() == 8)
         return A;
@@ -195,7 +195,7 @@
     }
     break;
   case X86::sub_8bit_hi:
-  //case X86::sub_sd:
+  case X86::sub_sd:
     if (B == &X86::GR8_ABCD_HRegClass) {
       if (A == &X86::GR64RegClass || A == &X86::GR64_ABCDRegClass ||
           A == &X86::GR64_NOREXRegClass ||
@@ -213,7 +213,7 @@
     }
     break;
   case X86::sub_16bit:
-  //case X86::sub_xmm:
+  case X86::sub_xmm:
     if (B == &X86::GR16RegClass) {
       if (A->getSize() == 4 || A->getSize() == 8)
         return A;

utils/TableGen/CodeGenTarget.h

diff --git a/utils/TableGen/CodeGenTarget.h b/utils/TableGen/CodeGenTarget.h
index 5b2587f..6b06b66 100644
--- a/utils/TableGen/CodeGenTarget.h
+++ b/utils/TableGen/CodeGenTarget.h
@@ -107,7 +107,11 @@
 
   // Map a SubRegIndex Record to its number.
   unsigned getSubRegIndexNo(Record *idx) const {
-    return idx->getValueAsInt("NumberHack");
+    if (SubRegIndices.empty()) ReadSubRegIndices();
+    std::vector<Record*>::const_iterator i =
+      std::find(SubRegIndices.begin(), SubRegIndices.end(), idx);
+    assert(i != SubRegIndices.end() && "Not a SubRegIndex");
+    return (i - SubRegIndices.begin()) + 1;
   }
 
   const std::vector<CodeGenRegisterClass> &getRegisterClasses() const {

utils/TableGen/RegisterInfoEmitter.cpp

diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index 85daa15..28429fa 100644
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -52,8 +52,7 @@
       OS << "namespace " << Namespace << " {\n";
     OS << "enum {\n  NoSubRegister,\n";
     for (unsigned i = 0, e = SubRegIndices.size(); i != e; ++i)
-      OS << "  " << SubRegIndices[i]->getName() << " = "
-         << SubRegIndices[i]->getValueAsInt("NumberHack") << ",\n";
+      OS << "  " << SubRegIndices[i]->getName() << ",\t// " << i+1 << "\n";
     OS << "  NUM_TARGET_SUBREGS = " << SubRegIndices.size()+1 << "\n";
     OS << "};\n";
     if (!Namespace.empty())