Collapse together the abstract superclass TargetRegInfo and SparcV9RegInfo, its
only concrete implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13977 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/SparcV9/MachineInstrAnnot.h b/lib/Target/SparcV9/MachineInstrAnnot.h
index 13e68c0..070848a 100644
--- a/lib/Target/SparcV9/MachineInstrAnnot.h
+++ b/lib/Target/SparcV9/MachineInstrAnnot.h
@@ -37,7 +37,7 @@
public:
// Constructors
CallArgInfo(Value* _argVal)
- : argVal(_argVal), argCopyReg(TargetRegInfo::getInvalidRegNum()),
+ : argVal(_argVal), argCopyReg(SparcV9RegInfo::getInvalidRegNum()),
passingMethod(0x0) {}
CallArgInfo(const CallArgInfo& obj)
diff --git a/lib/Target/SparcV9/RegAlloc/LiveRangeInfo.h b/lib/Target/SparcV9/RegAlloc/LiveRangeInfo.h
index a8d0e71..c6accdb 100644
--- a/lib/Target/SparcV9/RegAlloc/LiveRangeInfo.h
+++ b/lib/Target/SparcV9/RegAlloc/LiveRangeInfo.h
@@ -34,7 +34,7 @@
class LiveRange;
class MachineInstr;
class RegClass;
-class TargetRegInfo;
+class SparcV9RegInfo;
class TargetMachine;
class Value;
class Function;
@@ -59,7 +59,7 @@
std::vector<RegClass *> & RegClassList;// vector containing register classess
- const TargetRegInfo& MRI; // machine reg info
+ const SparcV9RegInfo& MRI; // machine reg info
std::vector<MachineInstr*> CallRetInstrList; // a list of all call/ret instrs
diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
index e8d6010..4c156bc 100644
--- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
@@ -1003,7 +1003,7 @@
/// setRelRegsUsedByThisInst().
///
static void markRegisterUsed(int RegNo, RegClass *RC, int RegType,
- const TargetRegInfo &TRI) {
+ const SparcV9RegInfo &TRI) {
unsigned classId = 0;
int classRegNum = TRI.getClassRegNum(RegNo, classId);
if (RC->getID() == classId)
diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h
index 65cc2e1..f344f0e 100644
--- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h
+++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h
@@ -69,7 +69,7 @@
FunctionLiveVarInfo *LVI; // LV information for this method
// (already computed for BBs)
LiveRangeInfo *LRI; // LR info (will be computed)
- const TargetRegInfo &MRI; // Machine Register information
+ const SparcV9RegInfo &MRI; // Machine Register information
const unsigned NumOfRegClasses; // recorded here for efficiency
// Map to indicate whether operands of each MachineInstr have been
diff --git a/lib/Target/SparcV9/RegAlloc/RegClass.cpp b/lib/Target/SparcV9/RegAlloc/RegClass.cpp
index 49eceaf..a748c1a 100644
--- a/lib/Target/SparcV9/RegAlloc/RegClass.cpp
+++ b/lib/Target/SparcV9/RegAlloc/RegClass.cpp
@@ -23,7 +23,7 @@
// createInterferenceGraph() above.
//----------------------------------------------------------------------------
RegClass::RegClass(const Function *M,
- const TargetRegInfo *_MRI_,
+ const SparcV9RegInfo *_MRI_,
const TargetRegClassInfo *_MRC_)
: Meth(M), MRI(_MRI_), MRC(_MRC_),
RegClassID( _MRC_->getRegClassID() ),
diff --git a/lib/Target/SparcV9/RegAlloc/RegClass.h b/lib/Target/SparcV9/RegAlloc/RegClass.h
index 05f53d7..0730de3 100644
--- a/lib/Target/SparcV9/RegAlloc/RegClass.h
+++ b/lib/Target/SparcV9/RegAlloc/RegClass.h
@@ -45,7 +45,7 @@
//-----------------------------------------------------------------------------
class RegClass {
const Function *const Meth; // Function we are working on
- const TargetRegInfo *MRI; // Machine register information
+ const SparcV9RegInfo *MRI; // Machine register information
const TargetRegClassInfo *const MRC; // Machine reg. class for this RegClass
const unsigned RegClassID; // my int ID
@@ -87,7 +87,7 @@
public:
RegClass(const Function *M,
- const TargetRegInfo *_MRI_,
+ const SparcV9RegInfo *_MRI_,
const TargetRegClassInfo *_MRC_);
inline void createInterferenceGraph() { IG.createGraph(); }
diff --git a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
index a11594e..631db7c 100644
--- a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
+++ b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
@@ -474,7 +474,7 @@
unsigned
SparcV9CodeEmitter::getRealRegNum(unsigned fakeReg,
MachineInstr &MI) {
- const TargetRegInfo &RI = *TM.getRegInfo();
+ const SparcV9RegInfo &RI = *TM.getRegInfo();
unsigned regClass, regType = RI.getRegType(fakeReg);
// At least map fakeReg into its class
fakeReg = RI.getClassRegNum(fakeReg, regClass);
diff --git a/lib/Target/SparcV9/SparcV9InstrSelection.cpp b/lib/Target/SparcV9/SparcV9InstrSelection.cpp
index 352122c..dbe40ac 100644
--- a/lib/Target/SparcV9/SparcV9InstrSelection.cpp
+++ b/lib/Target/SparcV9/SparcV9InstrSelection.cpp
@@ -2527,7 +2527,7 @@
const Type* argType = argVal->getType();
unsigned regType = regInfo.getRegTypeForDataType(argType);
unsigned argSize = target.getTargetData().getTypeSize(argType);
- int regNumForArg = TargetRegInfo::getInvalidRegNum();
+ int regNumForArg = SparcV9RegInfo::getInvalidRegNum();
unsigned regClassIDOfArgReg;
// Check for FP arguments to varargs functions.
diff --git a/lib/Target/SparcV9/SparcV9RegClassInfo.h b/lib/Target/SparcV9/SparcV9RegClassInfo.h
index e01c69f..33c7961 100644
--- a/lib/Target/SparcV9/SparcV9RegClassInfo.h
+++ b/lib/Target/SparcV9/SparcV9RegClassInfo.h
@@ -9,7 +9,7 @@
//
// This file defines the register classes used by the SparcV9 target. It
// implicitly defines (using enums) the "class register numbers" used in
-// the SparcV9 target, which are converted using a formula in the TargetRegInfo
+// the SparcV9 target, which are converted using a formula in the SparcV9RegInfo
// class to "unified register numbers".
//
//===----------------------------------------------------------------------===//
diff --git a/lib/Target/SparcV9/SparcV9RegInfo.cpp b/lib/Target/SparcV9/SparcV9RegInfo.cpp
index a4afc4e..0c36d3b 100644
--- a/lib/Target/SparcV9/SparcV9RegInfo.cpp
+++ b/lib/Target/SparcV9/SparcV9RegInfo.cpp
@@ -36,7 +36,7 @@
};
SparcV9RegInfo::SparcV9RegInfo(const SparcV9TargetMachine &tgt)
- : TargetRegInfo(tgt), NumOfIntArgRegs(6), NumOfFloatArgRegs(32)
+ : target (tgt), NumOfIntArgRegs (6), NumOfFloatArgRegs (32)
{
MachineRegClassArr.push_back(new SparcV9IntRegClass(IntRegClassID));
MachineRegClassArr.push_back(new SparcV9FloatRegClass(FloatRegClassID));
diff --git a/lib/Target/SparcV9/SparcV9RegInfo.h b/lib/Target/SparcV9/SparcV9RegInfo.h
index bc11a64..da6e5ad 100644
--- a/lib/Target/SparcV9/SparcV9RegInfo.h
+++ b/lib/Target/SparcV9/SparcV9RegInfo.h
@@ -53,7 +53,7 @@
// This defaults to marking a single register but may mark multiple
// registers when a single number denotes paired registers.
//
- virtual void markColorsUsed(unsigned RegInClass,
+ void markColorsUsed(unsigned RegInClass,
int UserRegType,
int RegTypeWanted,
std::vector<bool> &IsColorUsedArr) const {
@@ -69,7 +69,7 @@
// for paired registers and other such silliness.
// It returns -1 if no unused color is found.
//
- virtual int findUnusedColor(int RegTypeWanted,
+ int findUnusedColor(int RegTypeWanted,
const std::vector<bool> &IsColorUsedArr) const {
// find first unused color in the IsColorUsedArr directly
unsigned NC = this->getNumOfAvailRegs();
@@ -82,30 +82,28 @@
// This method should find a color which is not used by neighbors
// (i.e., a false position in IsColorUsedArr) and
- virtual void colorIGNode(IGNode *Node,
- const std::vector<bool> &IsColorUsedArr) const = 0;
+ void colorIGNode(IGNode *Node,
+ const std::vector<bool> &IsColorUsedArr) const;
// Check whether a specific register is volatile, i.e., whether it is not
// preserved across calls
- virtual bool isRegVolatile(int Reg) const = 0;
+ bool isRegVolatile(int Reg) const;
// Check whether a specific register is modified as a side-effect of the
// call instruction itself,
- virtual bool modifiedByCall(int Reg) const {return false; }
+ bool modifiedByCall(int Reg) const {return false; }
- virtual const char* const getRegName(unsigned reg) const = 0;
+ virtual const char* const getRegName(unsigned reg) const;
TargetRegClassInfo(unsigned ID, unsigned NVR, unsigned NAR)
: RegClassID(ID), NumOfAvailRegs(NVR), NumOfAllRegs(NAR) {}
};
-
-//---------------------------------------------------------------------------
-/// TargetRegInfo - Interface to register info of target machine
+/// SparcV9RegInfo - Interface to register info of SparcV9 target machine
///
-class TargetRegInfo {
- TargetRegInfo(const TargetRegInfo &); // DO NOT IMPLEMENT
- void operator=(const TargetRegInfo &); // DO NOT IMPLEMENT
+class SparcV9RegInfo {
+ SparcV9RegInfo(const SparcV9RegInfo &); // DO NOT IMPLEMENT
+ void operator=(const SparcV9RegInfo &); // DO NOT IMPLEMENT
protected:
// A vector of all machine register classes
//
@@ -119,20 +117,21 @@
//
static int getInvalidRegNum() { return -1; }
- TargetRegInfo(const TargetMachine& tgt) : target(tgt) { }
- virtual ~TargetRegInfo() {
- for (unsigned i = 0, e = MachineRegClassArr.size(); i != e; ++i)
- delete MachineRegClassArr[i];
- }
// According the definition of a MachineOperand class, a Value in a
// machine instruction can go into either a normal register or a
// condition code register. If isCCReg is true below, the ID of the condition
// code register class will be returned. Otherwise, the normal register
// class (eg. int, float) must be returned.
- virtual unsigned getRegClassIDOfType (const Type *type,
- bool isCCReg = false) const = 0;
- virtual unsigned getRegClassIDOfRegType(int regType) const = 0;
+
+ // To find the register class used for a specified Type
+ //
+ unsigned getRegClassIDOfType (const Type *type,
+ bool isCCReg = false) const;
+
+ // To find the register class to which a specified register belongs
+ //
+ unsigned getRegClassIDOfRegType(int regType) const;
unsigned getRegClassIDOfReg(int unifiedRegNum) const {
unsigned classId = 0;
@@ -148,88 +147,48 @@
return MachineRegClassArr[i];
}
- // returns the register that is hardwired to zero if any (-1 if none)
+ // getZeroRegNum - returns the register that is hardwired to always contain
+ // zero, if any (-1 if none). This is the unified register number.
//
- virtual unsigned getZeroRegNum() const = 0;
-
- // Number of registers used for passing int args (usually 6: %o0 - %o5)
- // and float args (usually 32: %f0 - %f31)
- //
- virtual unsigned const getNumOfIntArgRegs() const = 0;
- virtual unsigned const getNumOfFloatArgRegs() const = 0;
+ unsigned getZeroRegNum() const;
// The following methods are used to color special live ranges (e.g.
// method args and return values etc.) with specific hardware registers
// as required. See SparcRegInfo.cpp for the implementation for Sparc.
//
- virtual void suggestRegs4MethodArgs(const Function *Func,
- LiveRangeInfo& LRI) const = 0;
+ void suggestRegs4MethodArgs(const Function *Func,
+ LiveRangeInfo& LRI) const;
- virtual void suggestRegs4CallArgs(MachineInstr *CallI,
- LiveRangeInfo& LRI) const = 0;
+ void suggestRegs4CallArgs(MachineInstr *CallI,
+ LiveRangeInfo& LRI) const;
- virtual void suggestReg4RetValue(MachineInstr *RetI,
- LiveRangeInfo& LRI) const = 0;
+ void suggestReg4RetValue(MachineInstr *RetI,
+ LiveRangeInfo& LRI) const;
- virtual void colorMethodArgs(const Function *Func,
+ void colorMethodArgs(const Function *Func,
LiveRangeInfo &LRI,
std::vector<MachineInstr*>& InstrnsBefore,
- std::vector<MachineInstr*>& InstrnsAfter) const = 0;
+ std::vector<MachineInstr*>& InstrnsAfter) const;
- // The following methods are used to generate "copy" machine instructions
- // for an architecture. Currently they are used in TargetRegClass
- // interface. However, they can be moved to TargetInstrInfo interface if
- // necessary.
- //
- // The function regTypeNeedsScratchReg() can be used to check whether a
- // scratch register is needed to copy a register of type `regType' to
- // or from memory. If so, such a scratch register can be provided by
- // the caller (e.g., if it knows which regsiters are free); otherwise
- // an arbitrary one will be chosen and spilled by the copy instructions.
- // If a scratch reg is needed, the reg. type that must be used
- // for scratch registers is returned in scratchRegType.
- //
- virtual bool regTypeNeedsScratchReg(int RegType,
- int& scratchRegType) const = 0;
-
- virtual void cpReg2RegMI(std::vector<MachineInstr*>& mvec,
- unsigned SrcReg, unsigned DestReg,
- int RegType) const = 0;
-
- virtual void cpReg2MemMI(std::vector<MachineInstr*>& mvec,
- unsigned SrcReg, unsigned DestPtrReg, int Offset,
- int RegType, int scratchReg = -1) const=0;
-
- virtual void cpMem2RegMI(std::vector<MachineInstr*>& mvec,
- unsigned SrcPtrReg, int Offset, unsigned DestReg,
- int RegType, int scratchReg = -1) const=0;
-
- virtual void cpValue2Value(Value *Src, Value *Dest,
- std::vector<MachineInstr*>& mvec) const = 0;
// Check whether a specific register is volatile, i.e., whether it is not
// preserved across calls
- inline virtual bool isRegVolatile(int RegClassID, int Reg) const {
+ inline bool isRegVolatile(int RegClassID, int Reg) const {
return MachineRegClassArr[RegClassID]->isRegVolatile(Reg);
}
// Check whether a specific register is modified as a side-effect of the
// call instruction itself,
- inline virtual bool modifiedByCall(int RegClassID, int Reg) const {
+ inline bool modifiedByCall(int RegClassID, int Reg) const {
return MachineRegClassArr[RegClassID]->modifiedByCall(Reg);
}
- // Returns the reg used for pushing the address when a method is called.
- // This can be used for other purposes between calls
+ // getCallAddressReg - Returns the reg used for pushing the address
+ // when a method is called. This can be used for other purposes
+ // between calls
//
- virtual unsigned getCallAddressReg() const = 0;
+ unsigned getCallAddressReg() const;
- // Returns the register containing the return address.
- //It should be made sure that this
- // register contains the return value when a return instruction is reached.
- //
- virtual unsigned getReturnAddressReg() const = 0;
-
// Each register class has a separate space for register IDs. To convert
// a regId in a register class to a common Id, or vice versa,
// we use the folloing two methods.
@@ -272,29 +231,18 @@
return MachineRegClassArr[regClassID]->getRegName(regNumInClass);
}
- // Get the register type for a register identified different ways.
- // Note that getRegTypeForLR(LR) != getRegTypeForDataType(LR->getType())!
- // The reg class of a LR depends both on the Value types in it and whether
- // they are CC registers or not (for example).
- virtual int getRegTypeForDataType(const Type* type) const = 0;
- virtual int getRegTypeForLR(const LiveRange *LR) const = 0;
- virtual int getRegType(int unifiedRegNum) const = 0;
-
- // The following methods are used to get the frame/stack pointers
- //
- virtual unsigned getFramePointer() const = 0;
- virtual unsigned getStackPointer() const = 0;
-
// This method gives the the number of bytes of stack space allocated
- // to a register when it is spilled to the stack.
+ // to a register when it is spilled to the stack, according to its
+ // register type.
//
- virtual int getSpilledRegSize(int RegType) const = 0;
-};
+ // For SparcV9, currently we allocate 8 bytes on stack for all
+ // register types. We can optimize this later if necessary to save stack
+ // space (However, should make sure that stack alignment is correct)
+ //
+ int getSpilledRegSize(int RegType) const {
+ return 8;
+ }
-
-/// This class implements the virtual class TargetRegInfo for SparcV9.
-///
-class SparcV9RegInfo : public TargetRegInfo {
private:
// Number of registers used for passing int args (usually 6: %o0 - %o5)
//
@@ -346,24 +294,10 @@
SparcV9RegInfo(const SparcV9TargetMachine &tgt);
- // To find the register class used for a specified Type
- //
- unsigned getRegClassIDOfType(const Type *type,
- bool isCCReg = false) const;
-
- // To find the register class to which a specified register belongs
- //
- unsigned getRegClassIDOfRegType(int regType) const;
-
- // getZeroRegNum - returns the register that contains always zero this is the
- // unified register number
- //
- virtual unsigned getZeroRegNum() const;
-
- // getCallAddressReg - returns the reg used for pushing the address when a
- // function is called. This can be used for other purposes between calls
- //
- unsigned getCallAddressReg() const;
+ ~SparcV9RegInfo() {
+ for (unsigned i = 0, e = MachineRegClassArr.size(); i != e; ++i)
+ delete MachineRegClassArr[i];
+ }
// Returns the register containing the return address.
// It should be made sure that this register contains the return
@@ -385,35 +319,10 @@
int regNumForFPArg(unsigned RegType, bool inCallee, bool isVarArgsCall,
unsigned argNo, unsigned& regClassId) const;
- // The following methods are used to color special live ranges (e.g.
- // function args and return values etc.) with specific hardware registers
- // as required. See SparcV9RegInfo.cpp for the implementation for SparcV9.
- //
- void suggestRegs4MethodArgs(const Function *Meth,
- LiveRangeInfo& LRI) const;
-
- void suggestRegs4CallArgs(MachineInstr *CallMI,
- LiveRangeInfo& LRI) const;
-
- void suggestReg4RetValue(MachineInstr *RetMI,
- LiveRangeInfo& LRI) const;
-
- void colorMethodArgs(const Function *Meth, LiveRangeInfo& LRI,
- std::vector<MachineInstr*>& InstrnsBefore,
- std::vector<MachineInstr*>& InstrnsAfter) const;
// method used for printing a register for debugging purposes
//
void printReg(const LiveRange *LR) const;
-
- // returns the # of bytes of stack space allocated for each register
- // type. For SparcV9, currently we allocate 8 bytes on stack for all
- // register types. We can optimize this later if necessary to save stack
- // space (However, should make sure that stack alignment is correct)
- //
- inline int getSpilledRegSize(int RegType) const {
- return 8;
- }
// To obtain the return value and the indirect call address (if any)
// contained in a CALL machine instruction
@@ -422,14 +331,19 @@
const Value * getCallInstIndirectAddrVal(const MachineInstr *CallMI) const;
// The following methods are used to generate "copy" machine instructions
- // for an architecture.
+ // for an architecture. Currently they are used in TargetRegClass
+ // interface. However, they can be moved to TargetInstrInfo interface if
+ // necessary.
//
// The function regTypeNeedsScratchReg() can be used to check whether a
// scratch register is needed to copy a register of type `regType' to
// or from memory. If so, such a scratch register can be provided by
// the caller (e.g., if it knows which regsiters are free); otherwise
// an arbitrary one will be chosen and spilled by the copy instructions.
+ // If a scratch reg is needed, the reg. type that must be used
+ // for scratch registers is returned in scratchRegType.
//
+
bool regTypeNeedsScratchReg(int RegType,
int& scratchRegClassId) const;
@@ -456,8 +370,8 @@
int getRegTypeForLR(const LiveRange *LR) const;
int getRegType(int unifiedRegNum) const;
- virtual unsigned getFramePointer() const;
- virtual unsigned getStackPointer() const;
+ unsigned getFramePointer() const;
+ unsigned getStackPointer() const;
};
} // End llvm namespace
diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.h b/lib/Target/SparcV9/SparcV9TargetMachine.h
index 9bc299c..65aa8b7 100644
--- a/lib/Target/SparcV9/SparcV9TargetMachine.h
+++ b/lib/Target/SparcV9/SparcV9TargetMachine.h
@@ -36,7 +36,7 @@
virtual const TargetInstrInfo *getInstrInfo() const { return &instrInfo; }
virtual const TargetSchedInfo *getSchedInfo() const { return &schedInfo; }
- virtual const TargetRegInfo *getRegInfo() const { return ®Info; }
+ virtual const SparcV9RegInfo *getRegInfo() const { return ®Info; }
virtual const TargetFrameInfo *getFrameInfo() const { return &frameInfo; }
virtual TargetJITInfo *getJITInfo() { return &jitInfo; }
virtual const MRegisterInfo *getRegisterInfo() const {