Teach TableGen to pre-calculate register enum values when creating the
CodeGenRegister entries. Use this information to more intelligently build
the literal register entires in the DAGISel matcher table. Specifically,
use a single-byte OPC_EmitRegister entry for registers with a value of
less than 256 and OPC_EmitRegister2 entry for registers with a larger value.
rdar://9066491
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127456 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/DAGISelMatcherGen.cpp b/utils/TableGen/DAGISelMatcherGen.cpp
index 7c0bade..393ac69 100644
--- a/utils/TableGen/DAGISelMatcherGen.cpp
+++ b/utils/TableGen/DAGISelMatcherGen.cpp
@@ -9,7 +9,9 @@
#include "DAGISelMatcher.h"
#include "CodeGenDAGPatterns.h"
+#include "CodeGenRegisters.h"
#include "Record.h"
+#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include <utility>
@@ -91,6 +93,10 @@
/// CurPredicate - As we emit matcher nodes, this points to the latest check
/// which should have future checks stuck into its Next position.
Matcher *CurPredicate;
+
+ /// RegisterDefMap - A map of register record definitions to the
+ /// corresponding target CodeGenRegister entry.
+ DenseMap<const Record *, const CodeGenRegister *> RegisterDefMap;
public:
MatcherGen(const PatternToMatch &pattern, const CodeGenDAGPatterns &cgp);
@@ -159,6 +165,12 @@
// If there are types that are manifestly known, infer them.
InferPossibleTypes();
+
+ // Populate the map from records to CodeGenRegister entries.
+ const CodeGenTarget &CGT = CGP.getTargetInfo();
+ const std::vector<CodeGenRegister> &Registers = CGT.getRegisters();
+ for (unsigned i = 0, e = Registers.size(); i != e; ++i)
+ RegisterDefMap[Registers[i].TheDef] = &Registers[i];
}
/// InferPossibleTypes - As we emit the pattern, we end up generating type
@@ -578,7 +590,8 @@
// If this is an explicit register reference, handle it.
if (DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue())) {
if (DI->getDef()->isSubClassOf("Register")) {
- AddMatcher(new EmitRegisterMatcher(DI->getDef(), N->getType(0)));
+ AddMatcher(new EmitRegisterMatcher(RegisterDefMap[DI->getDef()],
+ N->getType(0)));
ResultOps.push_back(NextRecordedOperandNo++);
return;
}