Reenable a basic SSA DAG builder optimization.
Jakob fixed ProcessImplicifDefs in r159149.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160910 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp
index 110f478..5b40cb4 100644
--- a/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -411,12 +411,11 @@
const MachineInstr *MI = SU->getInstr();
unsigned Reg = MI->getOperand(OperIdx).getReg();
- // SSA defs do not have output/anti dependencies.
+ // Singly defined vregs do not have output/anti dependencies.
// The current operand is a def, so we have at least one.
- //
- // FIXME: This optimization is disabled pending PR13112.
- //if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
- // return;
+ // Check here if there are any others...
+ if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
+ return;
// Add output dependence to the next nearest def of this vreg.
//