diff --git a/lib/Target/X86/X86ISelPattern.cpp b/lib/Target/X86/X86ISelPattern.cpp
index 61b7e59..6613ba6 100644
--- a/lib/Target/X86/X86ISelPattern.cpp
+++ b/lib/Target/X86/X86ISelPattern.cpp
@@ -160,6 +160,26 @@
   if (F.isVarArg())
     VarArgsFrameIndex = MFI->CreateFixedObject(1, ArgOffset);
   ReturnAddrIndex = 0;  // No return address slot generated yet.
+
+  // Finally, inform the code generator which regs we return values in.
+  switch (getValueType(F.getReturnType())) {
+  default: assert(0 && "Unknown type!");
+  case MVT::isVoid: break;
+  case MVT::i1:
+  case MVT::i8:
+  case MVT::i16:
+  case MVT::i32:
+    MF.addLiveOut(X86::EAX);
+    break;
+  case MVT::i64:
+    MF.addLiveOut(X86::EAX);
+    MF.addLiveOut(X86::EDX);
+    break;
+  case MVT::f32:
+  case MVT::f64:
+    MF.addLiveOut(X86::ST0);
+    break;
+  }
   return ArgValues;
 }
 
@@ -2929,9 +2949,6 @@
 
       BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(Tmp1);
       BuildMI(BB, X86::MOV32rr, 1, X86::EDX).addReg(Tmp2);
-      // Declare that EAX & EDX are live on exit.
-      BuildMI(BB, X86::IMPLICIT_USE, 3).addReg(X86::EAX).addReg(X86::EDX)
-	.addReg(X86::ESP);
       break;
     case 2:
       if (getRegPressure(N.getOperand(0)) > getRegPressure(N.getOperand(1))) {
@@ -2945,12 +2962,9 @@
       default: assert(0 && "All other types should have been promoted!!");
       case MVT::f64:
 	BuildMI(BB, X86::FpSETRESULT, 1).addReg(Tmp1);
-	// Declare that top-of-stack is live on exit
-	BuildMI(BB, X86::IMPLICIT_USE, 2).addReg(X86::ST0).addReg(X86::ESP);
 	break;
       case MVT::i32:
 	BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(Tmp1);
-	BuildMI(BB, X86::IMPLICIT_USE, 2).addReg(X86::EAX).addReg(X86::ESP);
 	break;
       }
       break;
diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp
index 48546aa..6c37b70 100644
--- a/lib/Target/X86/X86ISelSimple.cpp
+++ b/lib/Target/X86/X86ISelSimple.cpp
@@ -618,7 +618,8 @@
   unsigned ArgOffset = 0;   // Frame mechanisms handle retaddr slot
   MachineFrameInfo *MFI = F->getFrameInfo();
 
-  for (Function::arg_iterator I = Fn.arg_begin(), E = Fn.arg_end(); I != E; ++I) {
+  for (Function::arg_iterator I = Fn.arg_begin(), E = Fn.arg_end();
+       I != E; ++I) {
     bool ArgLive = !I->use_empty();
     unsigned Reg = ArgLive ? getReg(*I) : 0;
     int FI;          // Frame object index
@@ -676,6 +677,25 @@
   // llvm.va_start.
   if (Fn.getFunctionType()->isVarArg())
     VarArgsFrameIndex = MFI->CreateFixedObject(1, ArgOffset);
+
+  // Finally, inform the compiler what our live-outs will be, aka, what we will
+  // be returning in registers.
+  if (Fn.getReturnType() != Type::VoidTy)
+    switch (getClassB(Fn.getReturnType())) {
+    default: assert(0 && "Unknown type!");
+    case cByte:
+    case cShort:
+    case cInt:
+      F->addLiveOut(X86::EAX);
+      break;
+    case cLong:
+      F->addLiveOut(X86::EAX);
+      F->addLiveOut(X86::EDX);
+      break;
+    case cFP:
+      F->addLiveOut(X86::ST0);
+      break;
+    }
 }
 
 /// EmitSpecialCodeForMain - Emit any code that needs to be executed only in
@@ -1434,23 +1454,16 @@
   case cShort:
   case cInt:
     promote32(X86::EAX, ValueRecord(RetVal));
-    // Declare that EAX is live on exit
-    BuildMI(BB, X86::IMPLICIT_USE, 2).addReg(X86::EAX).addReg(X86::ESP);
     break;
   case cFP: {                  // Floats & Doubles: Return in ST(0)
     unsigned RetReg = getReg(RetVal);
     BuildMI(BB, X86::FpSETRESULT, 1).addReg(RetReg);
-    // Declare that top-of-stack is live on exit
-    BuildMI(BB, X86::IMPLICIT_USE, 2).addReg(X86::ST0).addReg(X86::ESP);
     break;
   }
   case cLong: {
     unsigned RetReg = getReg(RetVal);
     BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(RetReg);
     BuildMI(BB, X86::MOV32rr, 1, X86::EDX).addReg(RetReg+1);
-    // Declare that EAX & EDX are live on exit
-    BuildMI(BB, X86::IMPLICIT_USE, 3).addReg(X86::EAX).addReg(X86::EDX)
-      .addReg(X86::ESP);
     break;
   }
   default: