Implement a method for inline asm support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25660 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 8f177c9..6b6ac57 100644
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -13,7 +13,9 @@
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/MRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
+#include "llvm/ADT/StringExtras.h"
using namespace llvm;
TargetLowering::TargetLowering(TargetMachine &tm)
@@ -132,3 +134,18 @@
uint64_t Mask) const {
return false;
}
+
+std::vector<unsigned> TargetLowering::
+getRegForInlineAsmConstraint(const std::string &Constraint) const {
+ // Scan to see if this constraint is a register name.
+ const MRegisterInfo *RI = TM.getRegisterInfo();
+ for (unsigned i = 1, e = RI->getNumRegs(); i != e; ++i) {
+ if (const char *Name = RI->get(i).Name)
+ if (StringsEqualNoCase(Constraint, Name))
+ return std::vector<unsigned>(1, i);
+ }
+
+ // Not a physreg, must not be a register reference or something.
+ return std::vector<unsigned>();
+}
+