ARM more NEON VLD/VST composite physical register refactoring.

Register pair, all lanes subscripting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152157 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/EDEmitter.cpp b/utils/TableGen/EDEmitter.cpp
index b2912d0..1b473d3 100644
--- a/utils/TableGen/EDEmitter.cpp
+++ b/utils/TableGen/EDEmitter.cpp
@@ -580,7 +580,7 @@
   REG("VecListFourD");
   REG("VecListOneDAllLanes");
   REG("VecListDPairAllLanes");
-  REG("VecListTwoQAllLanes");
+  REG("VecListDPairSpacedAllLanes");
 
   IMM("i32imm");
   IMM("fbits16");