Ignore isCodeGenOnly instructions when generating diassembly tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127619 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/FixedLenDecoderEmitter.cpp b/utils/TableGen/FixedLenDecoderEmitter.cpp
index 2c222b3..bbcecab 100644
--- a/utils/TableGen/FixedLenDecoderEmitter.cpp
+++ b/utils/TableGen/FixedLenDecoderEmitter.cpp
@@ -1224,7 +1224,8 @@
   if (Bits.allInComplete()) return false;
 
   // Ignore "asm parser only" instructions.
-  if (Def.getValueAsBit("isAsmParserOnly"))
+  if (Def.getValueAsBit("isAsmParserOnly") ||
+      Def.getValueAsBit("isCodeGenOnly"))
     return false;
 
   std::vector<OperandInfo> InsnOperands;