Let's see if we can break things.
Lower GOT relative addresses to Lo and HI.
Update both ISels to select them when they can.
Saves instructions here and there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25001 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp
index 9b2fce2..8d2ffa7 100644
--- a/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -104,6 +104,11 @@
setOperationAction(ISD::LOCATION, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
+ // We want to legalize GlobalAddress and ConstantPool nodes into the
+ // appropriate instructions to materialize the address.
+ setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);
+ setOperationAction(ISD::ConstantPool, MVT::i64, Custom);
+
addLegalFPImmediate(+0.0); //F31
addLegalFPImmediate(-0.0); //-F31
@@ -434,6 +439,28 @@
return DAG.getLoad(MVT::i64, ST, FI, DAG.getSrcValue(0));
}
}
+ case ISD::ConstantPool: {
+ Constant *C = cast<ConstantPoolSDNode>(Op)->get();
+ SDOperand CPI = DAG.getTargetConstantPool(C, MVT::i64);
+
+ SDOperand Hi = DAG.getNode(AlphaISD::GPRelHi, MVT::i64, CPI,
+ DAG.getNode(AlphaISD::GlobalBaseReg, MVT::i64));
+ SDOperand Lo = DAG.getNode(AlphaISD::GPRelLo, MVT::i64, CPI, Hi);
+ return Lo;
+ }
+ case ISD::GlobalAddress: {
+ GlobalAddressSDNode *GSDN = cast<GlobalAddressSDNode>(Op);
+ GlobalValue *GV = GSDN->getGlobal();
+ SDOperand GA = DAG.getTargetGlobalAddress(GV, MVT::i64, GSDN->getOffset());
+
+ if (!GV->hasWeakLinkage() && !GV->isExternal()) {
+ SDOperand Hi = DAG.getNode(AlphaISD::GPRelHi, MVT::i64, GA,
+ DAG.getNode(AlphaISD::GlobalBaseReg, MVT::i64));
+ SDOperand Lo = DAG.getNode(AlphaISD::GPRelLo, MVT::i64, GA, Hi);
+ return Lo;
+ } else
+ return GA;
+ }
}