commit 4ff28527bb8e5ed4ae4b65f0fa6967eb79a05d4c
author Evan Cheng <evan.cheng@apple.com> Sat Apr 17 06:12:32 2010 +0000
committer Evan Cheng <evan.cheng@apple.com> Sat Apr 17 06:12:32 2010 +0000
tree 6a3edb9abde502a8ec430ca5d525a3542388bb54
parent 9f3f061d74e19543be61e797127c54546668600c

Another 80 col violation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101620 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 1cf24d2..7b7f4ed 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -1385,7 +1385,8 @@
 
   if (NVTBits < EVTBits) {
     Hi = DAG.getNode(ISD::AssertSext, dl, NVT, Hi,
-                     DAG.getValueType(EVT::getIntegerVT(*DAG.getContext(), EVTBits - NVTBits)));
+                     DAG.getValueType(EVT::getIntegerVT(*DAG.getContext(),
+                                                        EVTBits - NVTBits)));
   } else {
     Lo = DAG.getNode(ISD::AssertSext, dl, NVT, Lo, DAG.getValueType(EVT));
     // The high part replicates the sign bit of Lo, make it explicit.