massive DAGISel patch. lots and lots more stuff compiles now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24483 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp
index 1e6bab6..e9e5237 100644
--- a/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -592,7 +592,9 @@
return Result;
}
case ISD::UNDEF: {
- BuildMI(BB, Alpha::IDEF, 0, Result);
+ Opc = isFP ? (DestType == MVT::f32 ? Alpha::IDEF_F32 : Alpha::IDEF_F64)
+ : Alpha::IDEF_I;
+ BuildMI(BB, Opc, 0, Result);
return Result;
}
@@ -1610,7 +1612,13 @@
case ISD::ImplicitDef:
++count_ins;
Select(N.getOperand(0));
- BuildMI(BB, Alpha::IDEF, 0,
+ switch(N.getValueType()) {
+ case MVT::f32: Opc = Alpha::IDEF_F32; break;
+ case MVT::f64: Opc = Alpha::IDEF_F64; break;
+ case MVT::i64: Opc = Alpha::IDEF_I; break;
+ default: assert(0 && "should have been legalized");
+ };
+ BuildMI(BB, Opc, 0,
cast<RegisterSDNode>(N.getOperand(1))->getReg());
return;