move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/LowerSubregs.cpp b/lib/CodeGen/LowerSubregs.cpp
index 1121d9b..b4ef648 100644
--- a/lib/CodeGen/LowerSubregs.cpp
+++ b/lib/CodeGen/LowerSubregs.cpp
@@ -129,7 +129,7 @@
if (MI->getOperand(1).isKill()) {
// We must make sure the super-register gets killed. Replace the
// instruction with KILL.
- MI->setDesc(TII->get(TargetInstrInfo::KILL));
+ MI->setDesc(TII->get(TargetOpcode::KILL));
MI->RemoveOperand(2); // SubIdx
DEBUG(dbgs() << "subreg: replace by: " << *MI);
return true;
@@ -242,7 +242,7 @@
// <undef>, we need to make sure it is alive by inserting a KILL
if (MI->getOperand(1).isUndef() && !MI->getOperand(0).isDead()) {
MachineInstrBuilder MIB = BuildMI(*MBB, MI, MI->getDebugLoc(),
- TII->get(TargetInstrInfo::KILL), DstReg);
+ TII->get(TargetOpcode::KILL), DstReg);
if (MI->getOperand(2).isUndef())
MIB.addReg(InsReg, RegState::Undef);
else
@@ -260,7 +260,7 @@
// If the source register being inserted is undef, then this becomes a
// KILL.
BuildMI(*MBB, MI, MI->getDebugLoc(),
- TII->get(TargetInstrInfo::KILL), DstSubReg);
+ TII->get(TargetOpcode::KILL), DstSubReg);
else {
bool Emitted = TII->copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
(void)Emitted;
@@ -314,11 +314,11 @@
mi != me;) {
MachineBasicBlock::iterator nmi = llvm::next(mi);
MachineInstr *MI = mi;
- if (MI->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG) {
+ if (MI->isExtractSubreg()) {
MadeChange |= LowerExtract(MI);
- } else if (MI->getOpcode() == TargetInstrInfo::INSERT_SUBREG) {
+ } else if (MI->isInsertSubreg()) {
MadeChange |= LowerInsert(MI);
- } else if (MI->getOpcode() == TargetInstrInfo::SUBREG_TO_REG) {
+ } else if (MI->isSubregToReg()) {
MadeChange |= LowerSubregToReg(MI);
}
mi = nmi;