move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index 0fcd5ec..f32a709 100644
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -531,7 +531,7 @@
std::string msg;
raw_string_ostream Msg(msg);
Msg << "Ran out of registers during register allocation!";
- if (MI->getOpcode() == TargetInstrInfo::INLINEASM) {
+ if (MI->isInlineAsm()) {
Msg << "\nPlease check your inline asm statement for invalid "
<< "constraints:\n";
MI->print(Msg, TM);
@@ -544,7 +544,7 @@
std::string msg;
raw_string_ostream Msg(msg);
Msg << "Ran out of registers during register allocation!";
- if (MI->getOpcode() == TargetInstrInfo::INLINEASM) {
+ if (MI->isInlineAsm()) {
Msg << "\nPlease check your inline asm statement for invalid "
<< "constraints:\n";
MI->print(Msg, TM);
@@ -796,7 +796,7 @@
// have in them, then mark them unallocatable.
// If any virtual regs are earlyclobber, allocate them now (before
// freeing inputs that are killed).
- if (MI->getOpcode()==TargetInstrInfo::INLINEASM) {
+ if (MI->isInlineAsm()) {
for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
MachineOperand& MO = MI->getOperand(i);
if (MO.isReg() && MO.isDef() && MO.isEarlyClobber() &&
@@ -845,7 +845,7 @@
// change the DEBUG_VALUE to be undef, which prevents the register
// from being reloaded here. Doing that would change the generated
// code, unless another use immediately follows this instruction.
- if (MI->getOpcode()==TargetInstrInfo::DEBUG_VALUE &&
+ if (MI->isDebugValue() &&
MI->getNumOperands()==3 && MI->getOperand(0).isReg()) {
unsigned VirtReg = MI->getOperand(0).getReg();
if (VirtReg && TargetRegisterInfo::isVirtualRegister(VirtReg) &&