commit 518bb53485df640d7b7e3f6b0544099020c42aa7
author Chris Lattner <sabre@nondot.org> Tue Feb 09 19:54:29 2010 +0000
committer Chris Lattner <sabre@nondot.org> Tue Feb 09 19:54:29 2010 +0000
tree 92b8684baa417c83b197e4abeaf1ab3f06930cbb
parent 4152778605dcab9e650b2cd03e2d8dc12f20aff6

move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/CodeEmitterGen.cpp

diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp
index 714a39c..f1857f5 100644
--- a/utils/TableGen/CodeEmitterGen.cpp
+++ b/utils/TableGen/CodeEmitterGen.cpp
@@ -35,7 +35,7 @@
         R->getName() == "IMPLICIT_DEF" ||
         R->getName() == "SUBREG_TO_REG" ||
         R->getName() == "COPY_TO_REGCLASS" ||
-        R->getName() == "DEBUG_VALUE") continue;
+        R->getName() == "DBG_VALUE") continue;
 
     BitsInit *BI = R->getValueAsBitsInit("Inst");
 
@@ -113,7 +113,7 @@
         R->getName() == "IMPLICIT_DEF" ||
         R->getName() == "SUBREG_TO_REG" ||
         R->getName() == "COPY_TO_REGCLASS" ||
-        R->getName() == "DEBUG_VALUE") {
+        R->getName() == "DBG_VALUE") {
       o << "    0U,\n";
       continue;
     }
@@ -152,7 +152,7 @@
         InstName == "IMPLICIT_DEF" ||
         InstName == "SUBREG_TO_REG" ||
         InstName == "COPY_TO_REGCLASS" ||
-        InstName == "DEBUG_VALUE") continue;
+        InstName == "DBG_VALUE") continue;
 
     BitsInit *BI = R->getValueAsBitsInit("Inst");
     const std::vector<RecordVal> &Vals = R->getValues();

utils/TableGen/CodeGenTarget.cpp

diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index c9af5f7..2688091 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -337,10 +337,10 @@
     throw "Could not find 'COPY_TO_REGCLASS' instruction!";
   const CodeGenInstruction *COPY_TO_REGCLASS = &I->second;
 
-  I = getInstructions().find("DEBUG_VALUE");
+  I = getInstructions().find("DBG_VALUE");
   if (I == Instructions.end())
-    throw "Could not find 'DEBUG_VALUE' instruction!";
-  const CodeGenInstruction *DEBUG_VALUE = &I->second;
+    throw "Could not find 'DBG_VALUE' instruction!";
+  const CodeGenInstruction *DBG_VALUE = &I->second;
 
   // Print out the rest of the instructions now.
   NumberedInstructions.push_back(PHI);
@@ -354,7 +354,7 @@
   NumberedInstructions.push_back(IMPLICIT_DEF);
   NumberedInstructions.push_back(SUBREG_TO_REG);
   NumberedInstructions.push_back(COPY_TO_REGCLASS);
-  NumberedInstructions.push_back(DEBUG_VALUE);
+  NumberedInstructions.push_back(DBG_VALUE);
   for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
     if (&II->second != PHI &&
         &II->second != INLINEASM &&
@@ -367,7 +367,7 @@
         &II->second != IMPLICIT_DEF &&
         &II->second != SUBREG_TO_REG &&
         &II->second != COPY_TO_REGCLASS &&
-        &II->second != DEBUG_VALUE)
+        &II->second != DBG_VALUE)
       NumberedInstructions.push_back(&II->second);
 }
 

utils/TableGen/InstrInfoEmitter.cpp

diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index cf40c78..21d97c3 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -346,7 +346,7 @@
         R->getName() != "IMPLICIT_DEF" &&
         R->getName() != "SUBREG_TO_REG" &&
         R->getName() != "COPY_TO_REGCLASS" &&
-        R->getName() != "DEBUG_VALUE")
+        R->getName() != "DBG_VALUE")
       throw R->getName() + " doesn't have a field named '" + 
             Val->getValue() + "'!";
     return;