commit 522ce975327e1aeba8317b233cdb54366e2645b5
author Bob Wilson <bob.wilson@apple.com> Mon Sep 28 14:30:20 2009 +0000
committer Bob Wilson <bob.wilson@apple.com> Mon Sep 28 14:30:20 2009 +0000
tree 858643786c87f2b6432334784f20184f2e04bdd8
parent 5adb66a646e2ec32265263739f5b01c3f50c176a

Pass the optimization level when constructing the ARM instruction selector.
Otherwise, it is always set to "default", which prevents debug info from
even being generated during isel.  Radar 7250345.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82988 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARM.h

diff --git a/lib/Target/ARM/ARM.h b/lib/Target/ARM/ARM.h
index e95dfc0..487ce1d 100644
--- a/lib/Target/ARM/ARM.h
+++ b/lib/Target/ARM/ARM.h
@@ -92,7 +92,8 @@
   }
 }
 
-FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM);
+FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM,
+                               CodeGenOpt::Level OptLevel);
 
 FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM,
                                        MachineCodeEmitter &MCE);