commit 52897f827e6604b9ec0d351b81b3b9df9fb4274f
author Chris Lattner <sabre@nondot.org> Thu Sep 29 17:38:52 2005 +0000
committer Chris Lattner <sabre@nondot.org> Thu Sep 29 17:38:52 2005 +0000
tree a252b1ca4ee7b935234d3942e4ff945fcbc95e27
parent f13befb456076d591267b8e126537f839a8ecd9a

consistency with other cases, no functionality change


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23524 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPCISelPattern.cpp

diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp
index 8cbbabf..9be7984 100644
--- a/lib/Target/PowerPC/PPCISelPattern.cpp
+++ b/lib/Target/PowerPC/PPCISelPattern.cpp
@@ -1058,6 +1058,8 @@
     DestType = N.getValue(0).getValueType();
     if (Result == 1)
       Result = ExprMap[N.getValue(0)] = MakeReg(DestType);
+    else 
+      ExprMap[N.getValue(1)] = 1;
     Tmp1 = dyn_cast<RegisterSDNode>(Node->getOperand(1))->getReg();
     if (MVT::isInteger(DestType))
       BuildMI(BB, PPC::OR, 2, Result).addReg(Tmp1).addReg(Tmp1);