commit 530086925695f074b0e1e38a0d88ee6a4c91c54c
author Venkatraman Govindaraju <venkatra@cs.wisc.edu> Wed May 29 04:46:31 2013 +0000
committer Venkatraman Govindaraju <venkatra@cs.wisc.edu> Wed May 29 04:46:31 2013 +0000
tree 3f0208636976c50c5a15795252265ff6a59225e6
parent 0cf4adbcef584cb56254e253b47315b4c3d073ec

[Sparc] Add support for leaf functions in sparc backend. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182822 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Sparc/DelaySlotFiller.cpp

diff --git a/lib/Target/Sparc/DelaySlotFiller.cpp b/lib/Target/Sparc/DelaySlotFiller.cpp
index db3f159..9961232 100644
--- a/lib/Target/Sparc/DelaySlotFiller.cpp
+++ b/lib/Target/Sparc/DelaySlotFiller.cpp
@@ -135,18 +135,22 @@
   bool sawLoad = false;
   bool sawStore = false;
 
-  MachineBasicBlock::iterator I = slot;
+  if (slot == MBB.begin())
+    return MBB.end();
 
   if (slot->getOpcode() == SP::RET)
     return MBB.end();
 
   if (slot->getOpcode() == SP::RETL) {
-    --I;
-    if (I->getOpcode() != SP::RESTORErr)
-      return MBB.end();
-    //change retl to ret
-    slot->setDesc(TII->get(SP::RET));
-    return I;
+    MachineBasicBlock::iterator J = slot;
+    --J;
+
+    if (J->getOpcode() == SP::RESTORErr
+        || J->getOpcode() == SP::RESTOREri) {
+      //change retl to ret
+      slot->setDesc(TII->get(SP::RET));
+      return J;
+    }
   }
 
   //Call's delay filler can def some of call's uses.
@@ -157,6 +161,8 @@
 
   bool done = false;
 
+  MachineBasicBlock::iterator I = slot;
+
   while (!done) {
     done = (I == MBB.begin());
 
@@ -274,9 +280,13 @@
       continue;
     if (MO.isDef())
       RegDefs.insert(Reg);
-    if (MO.isUse())
+    if (MO.isUse()) {
+      //Implicit register uses of retl are return values and
+      //retl does not use them.
+      if (MO.isImplicit() && MI->getOpcode() == SP::RETL)
+        continue;
       RegUses.insert(Reg);
-
+    }
   }
 }