Add named timer groups for the different stages of register allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121604 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/RegAllocBasic.cpp b/lib/CodeGen/RegAllocBasic.cpp
index 3c84543..eb1b907 100644
--- a/lib/CodeGen/RegAllocBasic.cpp
+++ b/lib/CodeGen/RegAllocBasic.cpp
@@ -42,6 +42,7 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
+#include "llvm/Support/Timer.h"
#include <cstdlib>
@@ -56,6 +57,8 @@
VerifyRegAlloc("verify-regalloc",
cl::desc("Verify live intervals before renaming"));
+const char *RegAllocBase::TimerGroupName = "Register Allocation";
+
namespace {
class PhysicalRegisterDescription : public AbstractRegisterDescription {
@@ -204,6 +207,7 @@
}
void RegAllocBase::init(VirtRegMap &vrm, LiveIntervals &lis) {
+ NamedRegionTimer T("Initialize", TimerGroupName, TimePassesIsEnabled);
TRI = &vrm.getTargetRegInfo();
MRI = &vrm.getRegInfo();
VRM = &vrm;
@@ -364,6 +368,7 @@
// Add newly allocated physical registers to the MBB live in sets.
void RegAllocBase::addMBBLiveIns(MachineFunction *MF) {
+ NamedRegionTimer T("MBB Live Ins", TimerGroupName, TimePassesIsEnabled);
typedef SmallVector<MachineBasicBlock*, 8> MBBVec;
MBBVec liveInMBBs;
MachineBasicBlock &entryMBB = *MF->begin();