TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> attributes as part of the matcher.
- Currently includes a hack to limit ourselves to "In32BitMode" and "In64BitMode", because we don't have the other infrastructure to properly deal with setting SSE, etc. features on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108677 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/MC/MCParser/TargetAsmParser.cpp b/lib/MC/MCParser/TargetAsmParser.cpp
index 05760c9..8d43c21 100644
--- a/lib/MC/MCParser/TargetAsmParser.cpp
+++ b/lib/MC/MCParser/TargetAsmParser.cpp
@@ -11,7 +11,7 @@
using namespace llvm;
TargetAsmParser::TargetAsmParser(const Target &T)
- : TheTarget(T)
+ : TheTarget(T), AvailableFeatures(0)
{
}