commit 5548755201a49bfe2af709ba0d0e7ba851cdb44f
author Eric Christopher <echristo@apple.com> Sat Jan 07 01:02:09 2012 +0000
committer Eric Christopher <echristo@apple.com> Sat Jan 07 01:02:09 2012 +0000
tree cd806c0fc91246ab7b75f474b02cd7e7418d68ea
parent 9c7b3da04ab39646e6d6687c309153410dafb916

Make the 'x' constraint work for AVX registers as well.

Fixes rdar://10614894

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147704 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 58bdc77..4b1c411 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -15098,7 +15098,8 @@
       break;
   case 'x':
   case 'Y':
-    if ((type->getPrimitiveSizeInBits() == 128) && Subtarget->hasXMM())
+    if (((type->getPrimitiveSizeInBits() == 128) && Subtarget->hasXMM()) ||
+        ((type->getPrimitiveSizeInBits() == 256) && Subtarget->hasAVX()))
       weight = CW_Register;
     break;
   case 'I':
@@ -15378,8 +15379,8 @@
     case 'Y':   // SSE_REGS if SSE2 allowed
       if (!Subtarget->hasXMMInt()) break;
       // FALL THROUGH.
-    case 'x':   // SSE_REGS if SSE1 allowed
-      if (!Subtarget->hasXMM()) break;
+    case 'x':   // SSE_REGS if SSE1 allowed or AVX_REGS if AVX allowed
+      if (!Subtarget->hasXMM() && !Subtarget->hasAVX()) break;
 
       switch (VT.getSimpleVT().SimpleTy) {
       default: break;
@@ -15398,6 +15399,15 @@
       case MVT::v4f32:
       case MVT::v2f64:
         return std::make_pair(0U, X86::VR128RegisterClass);
+      // AVX types.
+      case MVT::v32i8:
+      case MVT::v16i16:
+      case MVT::v8i32:
+      case MVT::v4i64:
+      case MVT::v8f32:
+      case MVT::v4f64:
+        return std::make_pair(0U, X86::VR256RegisterClass);
+        
       }
       break;
     }