Spell `necessary' correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7944 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp
index 6a80019..0443c18 100644
--- a/lib/Target/CBackend/CBackend.cpp
+++ b/lib/Target/CBackend/CBackend.cpp
@@ -924,7 +924,7 @@
}
// Specific Instruction type classes... note that all of the casts are
-// neccesary because we use the instruction classes as opaque types...
+// necessary because we use the instruction classes as opaque types...
//
void CWriter::visitReturnInst(ReturnInst &I) {
// Don't output a void return if this is the last basic block in the function
@@ -1024,7 +1024,7 @@
printBranchToBlock(I.getParent(), I.getSuccessor(1), 2);
}
} else {
- // First goto not neccesary, assume second one is...
+ // First goto not necessary, assume second one is...
Out << " if (!";
writeOperand(I.getCondition());
Out << ") {\n";
diff --git a/lib/Target/CBackend/Writer.cpp b/lib/Target/CBackend/Writer.cpp
index 6a80019..0443c18 100644
--- a/lib/Target/CBackend/Writer.cpp
+++ b/lib/Target/CBackend/Writer.cpp
@@ -924,7 +924,7 @@
}
// Specific Instruction type classes... note that all of the casts are
-// neccesary because we use the instruction classes as opaque types...
+// necessary because we use the instruction classes as opaque types...
//
void CWriter::visitReturnInst(ReturnInst &I) {
// Don't output a void return if this is the last basic block in the function
@@ -1024,7 +1024,7 @@
printBranchToBlock(I.getParent(), I.getSuccessor(1), 2);
}
} else {
- // First goto not neccesary, assume second one is...
+ // First goto not necessary, assume second one is...
Out << " if (!";
writeOperand(I.getCondition());
Out << ") {\n";
diff --git a/lib/Target/SparcV9/SparcV9AsmPrinter.cpp b/lib/Target/SparcV9/SparcV9AsmPrinter.cpp
index 13b3c38..3a98931 100644
--- a/lib/Target/SparcV9/SparcV9AsmPrinter.cpp
+++ b/lib/Target/SparcV9/SparcV9AsmPrinter.cpp
@@ -1,6 +1,6 @@
//===-- EmitAssembly.cpp - Emit Sparc Specific .s File ---------------------==//
//
-// This file implements all of the stuff neccesary to output a .s file from
+// This file implements all of the stuff necessary to output a .s file from
// LLVM. The code in this file assumes that the specified module has already
// been compiled into the internal data structures of the Module.
//
@@ -90,10 +90,10 @@
}
// enterSection - Use this method to enter a different section of the output
- // executable. This is used to only output neccesary section transitions.
+ // executable. This is used to only output necessary section transitions.
//
void enterSection(enum Sections S) {
- if (S == CurSection) return; // Only switch section if neccesary
+ if (S == CurSection) return; // Only switch section if necessary
CurSection = S;
toAsm << "\n\t.section ";
diff --git a/lib/Target/TargetData.cpp b/lib/Target/TargetData.cpp
index e86e51f..4a1ba70 100644
--- a/lib/Target/TargetData.cpp
+++ b/lib/Target/TargetData.cpp
@@ -15,7 +15,7 @@
#include "llvm/DerivedTypes.h"
#include "llvm/Constants.h"
-// Handle the Pass registration stuff neccesary to use TargetData's.
+// Handle the Pass registration stuff necessary to use TargetData's.
namespace {
// Register the default SparcV9 implementation...
RegisterPass<TargetData> X("targetdata", "Target Data Layout");
@@ -45,7 +45,7 @@
getTypeInfo(Ty, &TD, TySize, A);
TyAlign = A;
- // Add padding if neccesary to make the data element aligned properly...
+ // Add padding if necessary to make the data element aligned properly...
if (StructSize % TyAlign != 0)
StructSize = (StructSize/TyAlign + 1) * TyAlign; // Add padding...
diff --git a/lib/Target/X86/FloatingPoint.cpp b/lib/Target/X86/FloatingPoint.cpp
index d620599..f8f483f 100644
--- a/lib/Target/X86/FloatingPoint.cpp
+++ b/lib/Target/X86/FloatingPoint.cpp
@@ -185,7 +185,7 @@
if (Reg >= X86::FP0 && Reg <= X86::FP6) {
DEBUG(std::cerr << "Register FP#" << Reg-X86::FP0 << " is dead!\n");
++I; // Insert fxch AFTER the instruction
- moveToTop(Reg-X86::FP0, I); // Insert fxch if neccesary
+ moveToTop(Reg-X86::FP0, I); // Insert fxch if necessary
--I; // Move to fxch or old instruction
popStackAfter(I); // Pop the top of the stack, killing value
}
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 5f19edb..9b9d06c 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -449,7 +449,7 @@
unsigned Opcode = MI.getOpcode();
const TargetInstrDescriptor &Desc = II->get(Opcode);
- // Emit instruction prefixes if neccesary
+ // Emit instruction prefixes if necessary
if (Desc.TSFlags & X86II::OpSize) MCE.emitByte(0x66);// Operand size...
switch (Desc.TSFlags & X86II::Op0Mask) {
diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp
index d620599..f8f483f 100644
--- a/lib/Target/X86/X86FloatingPoint.cpp
+++ b/lib/Target/X86/X86FloatingPoint.cpp
@@ -185,7 +185,7 @@
if (Reg >= X86::FP0 && Reg <= X86::FP6) {
DEBUG(std::cerr << "Register FP#" << Reg-X86::FP0 << " is dead!\n");
++I; // Insert fxch AFTER the instruction
- moveToTop(Reg-X86::FP0, I); // Insert fxch if neccesary
+ moveToTop(Reg-X86::FP0, I); // Insert fxch if necessary
--I; // Move to fxch or old instruction
popStackAfter(I); // Pop the top of the stack, killing value
}
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index add8e45..7d33c3f 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -82,7 +82,7 @@
}
// hasSPAdjust - Return true if this function has ESP adjustment instructions in
-// the prolog and epilog which allocate local stack space. This is neccesary
+// the prolog and epilog which allocate local stack space. This is necessary
// because we elide these instructions if there are no function calls in the
// current function (ie, this is a leaf function). In this case, we can refer
// beyond the stack pointer because we know that nothing will trample on that