Only lower SELECT when using DAG based isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24755 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 7520b2e..8abdfbf 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -27,6 +27,7 @@
X86VectorEnum llvm::X86Vector = NoSSE;
bool llvm::X86ScalarSSE = false;
+bool llvm::X86DAGIsel = false;
/// X86TargetMachineModule - Note that this is used on hosts that cannot link
/// in a library unless there are references into the library. In particular,
@@ -44,8 +45,10 @@
cl::location(X86ScalarSSE),
cl::init(false));
- cl::opt<bool> EnableX86DAGDAG("enable-x86-dag-isel", cl::Hidden,
- cl::desc("Enable DAG-to-DAG isel for X86"));
+ cl::opt<bool, true> EnableX86DAGDAG("enable-x86-dag-isel", cl::Hidden,
+ cl::desc("Enable DAG-to-DAG isel for X86"),
+ cl::location(X86DAGIsel),
+ cl::init(false));
// FIXME: This should eventually be handled with target triples and
// subtarget support!
@@ -124,7 +127,7 @@
PM.add(createUnreachableBlockEliminationPass());
// Install an instruction selector.
- if (EnableX86DAGDAG)
+ if (X86DAGIsel)
PM.add(createX86ISelDag(*this));
else
PM.add(createX86ISelPattern(*this));
@@ -191,7 +194,7 @@
PM.add(createUnreachableBlockEliminationPass());
// Install an instruction selector.
- if (EnableX86DAGDAG)
+ if (X86DAGIsel)
PM.add(createX86ISelDag(TM));
else
PM.add(createX86ISelPattern(TM));