Implement 64-bit undef, sub, shl/shr, srem/urem


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28929 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp
index a530b1e..f1c0e07 100644
--- a/lib/Target/PowerPC/PPCCodeEmitter.cpp
+++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp
@@ -125,7 +125,8 @@
     default:
       MCE.emitWordBE(getBinaryCodeForInstr(*I));
       break;
-    case PPC::IMPLICIT_DEF_GPR:
+    case PPC::IMPLICIT_DEF_GPRC:
+    case PPC::IMPLICIT_DEF_G8RC:
     case PPC::IMPLICIT_DEF_F8:
     case PPC::IMPLICIT_DEF_F4:
     case PPC::IMPLICIT_DEF_VRRC: