no need to expand ISD::TRAP to X86ISD::TRAP, just match ISD::TRAP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46015 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 0587dfa..38ced90 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -294,7 +294,7 @@
setOperationAction(ISD::TRAMPOLINE, MVT::Other, Custom);
- setOperationAction(ISD::TRAP, MVT::Other, Custom);
+ setOperationAction(ISD::TRAP, MVT::Other, Legal);
// VASTART needs to be custom lowered to use the VarArgsFrameIndex
setOperationAction(ISD::VASTART , MVT::Other, Custom);
@@ -4950,10 +4950,6 @@
ISD::TRUNCATE : ISD::ZERO_EXTEND), VT, RetVal);
}
-SDOperand X86TargetLowering::LowerTRAP(SDOperand Op, SelectionDAG &DAG) {
- return DAG.getNode(X86ISD::TRAP, MVT::Other, Op.getOperand(0));
-}
-
SDOperand X86TargetLowering::LowerCTLZ(SDOperand Op, SelectionDAG &DAG) {
MVT::ValueType VT = Op.getValueType();
MVT::ValueType OpVT = VT;
@@ -5058,7 +5054,6 @@
case ISD::FLT_ROUNDS: return LowerFLT_ROUNDS(Op, DAG);
case ISD::CTLZ: return LowerCTLZ(Op, DAG);
case ISD::CTTZ: return LowerCTTZ(Op, DAG);
- case ISD::TRAP: return LowerTRAP(Op, DAG);
// FIXME: REMOVE THIS WHEN LegalizeDAGTypes lands.
case ISD::READCYCLECOUNTER:
@@ -5098,7 +5093,6 @@
case X86ISD::CALL: return "X86ISD::CALL";
case X86ISD::TAILCALL: return "X86ISD::TAILCALL";
case X86ISD::RDTSC_DAG: return "X86ISD::RDTSC_DAG";
- case X86ISD::TRAP: return "X86ISD::TRAP";
case X86ISD::CMP: return "X86ISD::CMP";
case X86ISD::COMI: return "X86ISD::COMI";
case X86ISD::UCOMI: return "X86ISD::UCOMI";