Add subtarget feature/processor defns to the .td file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23903 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Alpha/Alpha.td b/lib/Target/Alpha/Alpha.td
index 1c01663..ae2286c 100644
--- a/lib/Target/Alpha/Alpha.td
+++ b/lib/Target/Alpha/Alpha.td
@@ -17,6 +17,13 @@
//Alpha is little endian
//===----------------------------------------------------------------------===//
+// Subtarget Features
+//===----------------------------------------------------------------------===//
+
+def FeatureCIX : SubtargetFeature<"CIX", "Enable CIX extentions">;
+def FeatureFIX : SubtargetFeature<"FIX", "Enable FIX extentions">;
+
+//===----------------------------------------------------------------------===//
// Register File Description
//===----------------------------------------------------------------------===//
@@ -36,6 +43,21 @@
// let TSFlagsShifts = [];
}
+//===----------------------------------------------------------------------===//
+// Alpha Processor Definitions
+//===----------------------------------------------------------------------===//
+
+def : Processor<"generic", NoItineraries, []>;
+def : Processor<"pca56" , NoItineraries, []>;
+def : Processor<"ev56" , NoItineraries, []>;
+def : Processor<"ev6" , NoItineraries, [FeatureFIX]>;
+def : Processor<"ev67" , NoItineraries, [FeatureFIX, FeatureCIX]>;
+
+//===----------------------------------------------------------------------===//
+// The Alpha Target
+//===----------------------------------------------------------------------===//
+
+
def Alpha : Target {
// Pointers on Alpha are 64-bits in size.
let PointerType = i64;