Thumb assembly parsing and encoding for ADR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137864 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
index ffc7499..f927877 100644
--- a/lib/Target/ARM/ARMInstrThumb.td
+++ b/lib/Target/ARM/ARMInstrThumb.td
@@ -1189,7 +1189,7 @@
// assembler.
def tADR : T1I<(outs tGPR:$Rd), (ins t_adrlabel:$addr, pred:$p),
- IIC_iALUi, "adr{$p}\t$Rd, #$addr", []>,
+ IIC_iALUi, "adr{$p}\t$Rd, $addr", []>,
T1Encoding<{1,0,1,0,0,?}> {
bits<3> Rd;
bits<8> addr;
diff --git a/test/CodeGen/ARM/select.ll b/test/CodeGen/ARM/select.ll
index d1493ee..a19c044 100644
--- a/test/CodeGen/ARM/select.ll
+++ b/test/CodeGen/ARM/select.ll
@@ -81,7 +81,7 @@
; CHECK-NEON-NEXT: cmp r0, [[REGISTER_1]]
; CHECK-NEON-NEXT: it eq
; CHECK-NEON-NEXT: moveq [[REGISTER_2]], #4
-; CHECK-NEON-NEXT: adr [[REGISTER_3:r[0-9]+]], #LCPI
+; CHECK-NEON-NEXT: adr [[REGISTER_3:r[0-9]+]], LCPI
; CHECK-NEON-NEXT: ldr
; CHECK-NEON: bx
diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s
index 4cdbf61..340743e 100644
--- a/test/MC/ARM/basic-thumb-instructions.s
+++ b/test/MC/ARM/basic-thumb-instructions.s
@@ -47,3 +47,12 @@
@------------------------------------------------------------------------------
@ FIXME: ADD (SP plus register)
@------------------------------------------------------------------------------
+
+
+@------------------------------------------------------------------------------
+@ ADR
+@------------------------------------------------------------------------------
+ adr r2, _baz
+
+@ CHECK: adr r2, _baz @ encoding: [A,0xa2]
+ @ fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10