Each instruction now has both an ImmType and a MemType. This describes
the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11967 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h
index 438acb0..5c1416e 100644
--- a/lib/Target/X86/X86InstrInfo.h
+++ b/lib/Target/X86/X86InstrInfo.h
@@ -111,21 +111,29 @@
//===------------------------------------------------------------------===//
// This three-bit field describes the size of a memory operand. Zero is
// unused so that we can tell if we forgot to set a value.
- ArgShift = 10,
- ArgMask = 7 << ArgShift,
- Arg8 = 1 << ArgShift,
- Arg16 = 2 << ArgShift,
- Arg32 = 3 << ArgShift,
- Arg64 = 4 << ArgShift, // 64 bit int argument for FILD64
- ArgF32 = 5 << ArgShift,
- ArgF64 = 6 << ArgShift,
- ArgF80 = 7 << ArgShift,
+ MemShift = 10,
+ MemMask = 7 << MemShift,
+ Mem8 = 1 << MemShift,
+ Mem16 = 2 << MemShift,
+ Mem32 = 3 << MemShift,
+ Mem64 = 4 << MemShift,
+ Mem80 = 5 << MemShift,
+ Mem128 = 6 << MemShift,
+
+ //===------------------------------------------------------------------===//
+ // This tow-bit field describes the size of an immediate operand. Zero is
+ // unused so that we can tell if we forgot to set a value.
+ ImmShift = 13,
+ ImmMask = 7 << ImmShift,
+ Imm8 = 1 << ImmShift,
+ Imm16 = 2 << ImmShift,
+ Imm32 = 3 << ImmShift,
//===------------------------------------------------------------------===//
// FP Instruction Classification... Zero is non-fp instruction.
// FPTypeMask - Mask for all of the FP types...
- FPTypeShift = 13,
+ FPTypeShift = 15,
FPTypeMask = 7 << FPTypeShift,
// NotFP - The default, set for instructions that do not use FP registers.
@@ -151,9 +159,9 @@
SpecialFP = 5 << FPTypeShift,
// PrintImplUses - Print out implicit uses in the assembly output.
- PrintImplUses = 1 << 16,
+ PrintImplUses = 1 << 18,
- OpcodeShift = 17,
+ OpcodeShift = 19,
OpcodeMask = 0xFF << OpcodeShift,
// Bits 25 -> 31 are unused
};