Fix dynamic linking on PPC64.
Dynamic linking on PPC64 has had problems since we had to move the top-down
hazard-detection logic post-ra. For dynamic linking to work there needs to be
a nop placed after every call. It turns out that it is really hard to guarantee
that nothing will be placed in between the call (bl) and the nop during post-ra
scheduling. Previous attempts at fixing this by placing logic inside the
hazard detector only partially worked.
This is now fixed in a different way: call+nop codegen-only instructions. As far
as CodeGen is concerned the pair is now a single instruction and cannot be split.
This solution works much better than previous attempts.
The scoreboard hazard detector is also renamed to be more generic, there is currently
no cpu-specific logic in it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153816 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCHazardRecognizers.cpp b/lib/Target/PowerPC/PPCHazardRecognizers.cpp
index ae317af..6ed1fb9 100644
--- a/lib/Target/PowerPC/PPCHazardRecognizers.cpp
+++ b/lib/Target/PowerPC/PPCHazardRecognizers.cpp
@@ -22,17 +22,29 @@
using namespace llvm;
//===----------------------------------------------------------------------===//
-// PowerPC 440 Hazard Recognizer
-void PPCHazardRecognizer440::EmitInstruction(SUnit *SU) {
+// PowerPC Scoreboard Hazard Recognizer
+void PPCScoreboardHazardRecognizer::EmitInstruction(SUnit *SU) {
const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
- if (!MCID) {
+ if (!MCID)
// This is a PPC pseudo-instruction.
return;
- }
ScoreboardHazardRecognizer::EmitInstruction(SU);
}
+ScheduleHazardRecognizer::HazardType
+PPCScoreboardHazardRecognizer::getHazardType(SUnit *SU, int Stalls) {
+ return ScoreboardHazardRecognizer::getHazardType(SU, Stalls);
+}
+
+void PPCScoreboardHazardRecognizer::AdvanceCycle() {
+ ScoreboardHazardRecognizer::AdvanceCycle();
+}
+
+void PPCScoreboardHazardRecognizer::Reset() {
+ ScoreboardHazardRecognizer::Reset();
+}
+
//===----------------------------------------------------------------------===//
// PowerPC 970 Hazard Recognizer
//
@@ -61,7 +73,6 @@
PPCHazardRecognizer970::PPCHazardRecognizer970(const TargetInstrInfo &tii)
: TII(tii) {
- LastWasBL8_ELF = false;
EndDispatchGroup();
}
@@ -132,15 +143,6 @@
return NoHazard;
unsigned Opcode = MI->getOpcode();
-
- // If the last instruction was a BL8_ELF, then the NOP must follow it
- // directly (this is strong requirement from the linker due to the ELF ABI).
- // We return only Hazard (and not NoopHazard) because if the NOP is necessary
- // then it will already be in the instruction stream (it is not always
- // necessary; tail calls, for example, do not need it).
- if (LastWasBL8_ELF && Opcode != PPC::NOP)
- return Hazard;
-
bool isFirst, isSingle, isCracked, isLoad, isStore;
PPCII::PPC970_Unit InstrType =
GetInstrType(Opcode, isFirst, isSingle, isCracked,
@@ -199,8 +201,6 @@
return;
unsigned Opcode = MI->getOpcode();
- LastWasBL8_ELF = (Opcode == PPC::BL8_ELF);
-
bool isFirst, isSingle, isCracked, isLoad, isStore;
PPCII::PPC970_Unit InstrType =
GetInstrType(Opcode, isFirst, isSingle, isCracked,
@@ -240,7 +240,6 @@
}
void PPCHazardRecognizer970::Reset() {
- LastWasBL8_ELF = false;
EndDispatchGroup();
}