commit 5b71d3af35f941585acb50de4909cff20f68680d
author Chris Lattner <sabre@nondot.org> Tue Sep 28 18:38:01 2004 +0000
committer Chris Lattner <sabre@nondot.org> Tue Sep 28 18:38:01 2004 +0000
tree d944e81aa58c0d5255abe2078a4e9254b85a0a32
parent 49db6fe193168239be2f5aa8b4201614b739e840

Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAG


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16553 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/CodeGenInstruction.h

diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h
index 5e6af31..8551a55 100644
--- a/utils/TableGen/CodeGenInstruction.h
+++ b/utils/TableGen/CodeGenInstruction.h
@@ -73,6 +73,7 @@
     bool isCall;
     bool isTwoAddress;
     bool isTerminator;
+    bool hasDelaySlot;
 
     CodeGenInstruction(Record *R, const std::string &AsmStr);
 

utils/TableGen/CodeGenTarget.cpp

diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index 49fd772..ba21405 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -197,6 +197,7 @@
   isCall       = R->getValueAsBit("isCall");
   isTwoAddress = R->getValueAsBit("isTwoAddress");
   isTerminator = R->getValueAsBit("isTerminator");
+  hasDelaySlot = R->getValueAsBit("hasDelaySlot");
 
   try {
     DagInit *DI = R->getValueAsDag("OperandList");

utils/TableGen/InstrInfoEmitter.cpp

diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index 0596f43..c02eda1 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -111,6 +111,7 @@
   if (Inst.isReturn)     OS << "|M_RET_FLAG";
   if (Inst.isBranch)     OS << "|M_BRANCH_FLAG";
   if (Inst.isBarrier)    OS << "|M_BARRIER_FLAG";
+  if (Inst.hasDelaySlot) OS << "|M_DELAY_SLOT_FLAG";
   if (Inst.isCall)       OS << "|M_CALL_FLAG";
   if (Inst.isTwoAddress) OS << "|M_2_ADDR_FLAG";
   if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";