Duplicated node may produce a non-physical register def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62015 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
index 4019ec1..ebe084d 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
@@ -157,8 +157,8 @@
}
void ScheduleDAGSDNodes::CreateVirtualRegisters(SDNode *Node, MachineInstr *MI,
- const TargetInstrDesc &II,
- DenseMap<SDValue, unsigned> &VRBaseMap) {
+ const TargetInstrDesc &II, bool IsClone,
+ DenseMap<SDValue, unsigned> &VRBaseMap) {
assert(Node->getMachineOpcode() != TargetInstrInfo::IMPLICIT_DEF &&
"IMPLICIT_DEF should have been handled as a special case elsewhere!");
@@ -192,6 +192,8 @@
}
SDValue Op(Node, i);
+ if (IsClone)
+ VRBaseMap.erase(Op);
bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second;
isNew = isNew; // Silence compiler warning.
assert(isNew && "Node emitted out of order - early");
@@ -487,7 +489,7 @@
// Add result register values for things that are defined by this
// instruction.
if (NumResults)
- CreateVirtualRegisters(Node, MI, II, VRBaseMap);
+ CreateVirtualRegisters(Node, MI, II, IsClone, VRBaseMap);
// Emit all of the actual operands of this instruction, adding them to the
// instruction as appropriate.