commit 5d05d9769ec98cdee359fd934a56c9455e21232b
author Daniel Dunbar <daniel@zuster.org> Thu Dec 16 17:21:02 2010 +0000
committer Daniel Dunbar <daniel@zuster.org> Thu Dec 16 17:21:02 2010 +0000
tree 7bb13655975ea4699280b1294ff6036fb56c61ad
parent fe068b3c36797848aed8cf90cdd38338258191c9

MC/Mach-O: Lift some MachObjectWriter arguments into the target specific

interface.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121981 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMAsmBackend.cpp

diff --git a/lib/Target/ARM/ARMAsmBackend.cpp b/lib/Target/ARM/ARMAsmBackend.cpp
index 9556a7d..db7e20c 100644
--- a/lib/Target/ARM/ARMAsmBackend.cpp
+++ b/lib/Target/ARM/ARMAsmBackend.cpp
@@ -29,6 +29,10 @@
 
 namespace {
 class ARMMachObjectWriter : public MCMachObjectTargetWriter {
+public:
+  ARMMachObjectWriter(bool Is64Bit, uint32_t CPUType,
+                      uint32_t CPUSubtype)
+    : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
 };
 
 class ARMAsmBackend : public TargetAsmBackend {
@@ -385,10 +389,11 @@
 
   MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
     // FIXME: Subtarget info should be derived. Force v7 for now.
-    return createMachObjectWriter(new ARMMachObjectWriter,
-                                  OS, /*Is64Bit=*/false,
-                                  object::mach::CTM_ARM,
-                                  object::mach::CSARM_V7,
+    return createMachObjectWriter(new ARMMachObjectWriter(
+                                    /*Is64Bit=*/false,
+                                    object::mach::CTM_ARM,
+                                    object::mach::CSARM_V7),
+                                  OS,
                                   /*IsLittleEndian=*/true);
   }
 

lib/Target/PowerPC/PPCAsmBackend.cpp

diff --git a/lib/Target/PowerPC/PPCAsmBackend.cpp b/lib/Target/PowerPC/PPCAsmBackend.cpp
index d8ab689..bf437e3 100644
--- a/lib/Target/PowerPC/PPCAsmBackend.cpp
+++ b/lib/Target/PowerPC/PPCAsmBackend.cpp
@@ -20,6 +20,10 @@
 
 namespace {
 class PPCMachObjectWriter : public MCMachObjectTargetWriter {
+public:
+  PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
+                      uint32_t CPUSubtype)
+    : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
 };
 
 class PPCAsmBackend : public TargetAsmBackend {
@@ -95,12 +99,12 @@
     
     MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
       bool is64 = getPointerSize() == 8;
-      return createMachObjectWriter(new PPCMachObjectWriter,
-                                    OS, /*Is64Bit=*/is64,
-                                    (is64 ? object::mach::CTM_PowerPC64 :
-                                     object::mach::CTM_PowerPC),
-                                    object::mach::CSPPC_ALL,
-                                    /*IsLittleEndian=*/false);
+      return createMachObjectWriter(new PPCMachObjectWriter(
+                                      /*Is64Bit=*/is64,
+                                      (is64 ? object::mach::CTM_PowerPC64 :
+                                       object::mach::CTM_PowerPC),
+                                      object::mach::CSPPC_ALL),
+                                    OS, /*IsLittleEndian=*/false);
     }
     
     virtual bool doesSectionRequireSymbols(const MCSection &Section) const {

lib/Target/X86/X86AsmBackend.cpp

diff --git a/lib/Target/X86/X86AsmBackend.cpp b/lib/Target/X86/X86AsmBackend.cpp
index 3c1c459..d137875 100644
--- a/lib/Target/X86/X86AsmBackend.cpp
+++ b/lib/Target/X86/X86AsmBackend.cpp
@@ -47,6 +47,10 @@
 
 namespace {
 class X86MachObjectWriter : public MCMachObjectTargetWriter {
+public:
+  X86MachObjectWriter(bool Is64Bit, uint32_t CPUType,
+                      uint32_t CPUSubtype)
+    : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
 };
 
 class X86AsmBackend : public TargetAsmBackend {
@@ -365,11 +369,11 @@
     : DarwinX86AsmBackend(T) {}
 
   MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
-    return createMachObjectWriter(new X86MachObjectWriter,
-                                  OS, /*Is64Bit=*/false,
-                                  object::mach::CTM_i386,
-                                  object::mach::CSX86_ALL,
-                                  /*IsLittleEndian=*/true);
+    return createMachObjectWriter(new X86MachObjectWriter(
+                                    /*Is64Bit=*/false,
+                                    object::mach::CTM_i386,
+                                    object::mach::CSX86_ALL),
+                                  OS, /*IsLittleEndian=*/true);
   }
 };
 
@@ -381,11 +385,11 @@
   }
 
   MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
-    return createMachObjectWriter(new X86MachObjectWriter,
-                                  OS, /*Is64Bit=*/true,
-                                  object::mach::CTM_x86_64,
-                                  object::mach::CSX86_ALL,
-                                  /*IsLittleEndian=*/true);
+    return createMachObjectWriter(new X86MachObjectWriter(
+                                    /*Is64Bit=*/true,
+                                    object::mach::CTM_x86_64,
+                                    object::mach::CSX86_ALL),
+                                  OS, /*IsLittleEndian=*/true);
   }
 
   virtual bool doesSectionRequireSymbols(const MCSection &Section) const {