commit 5e99dd9c2b56681213288404d686cf3f33f8eb5f
author Andrew Lenharth <andrewl@lenharth.org> Thu Mar 31 22:02:25 2005 +0000
committer Andrew Lenharth <andrewl@lenharth.org> Thu Mar 31 22:02:25 2005 +0000
tree 127b2f99dcac6e4d57170e141c916731518c0228
parent e3f570c3f9048bc71a9f5841343eae63719e439b

make fp div trick dependend on flag


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20967 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Alpha/AlphaISelPattern.cpp

diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp
index d7df75b..ba5178b 100644
--- a/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -37,7 +37,7 @@
                              cl::desc("Use the FP div instruction for integer div when possible"), 
                              cl::Hidden);
   cl::opt<bool> EnableAlpha("enable-alpha-ftoi", 
-                             cl::desc("Enablue use of ftoi* and itof* instructions (ev6 and higher)"), 
+                             cl::desc("Enable use of ftoi* and itof* instructions (ev6 and higher)"), 
                              cl::Hidden);
 }
 
@@ -1061,7 +1061,7 @@
   case ISD::SIGN_EXTEND_INREG:
     {
       //do SDIV opt for all levels of ints
-      if (N.getOperand(0).getOpcode() == ISD::SDIV)
+      if (EnableAlphaIDIV && N.getOperand(0).getOpcode() == ISD::SDIV)
       {
         Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
         Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));