Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp b/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
index 6692f2e..fd2ae51 100644
--- a/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
+++ b/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
@@ -50,7 +50,8 @@
const MipsSubtarget *Subtarget;
public:
explicit MipsAsmPrinter(raw_ostream &O, MipsTargetMachine &TM,
- const TargetAsmInfo *T, unsigned OL, bool V)
+ const TargetAsmInfo *T, CodeGenOpt::Level OL,
+ bool V)
: AsmPrinter(O, TM, T, OL, V) {
Subtarget = &TM.getSubtarget<MipsSubtarget>();
}
@@ -91,7 +92,8 @@
/// regardless of whether the function is in SSA form.
FunctionPass *llvm::createMipsCodePrinterPass(raw_ostream &o,
MipsTargetMachine &tm,
- unsigned OptLevel, bool verbose) {
+ CodeGenOpt::Level OptLevel,
+ bool verbose) {
return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose);
}
diff --git a/lib/Target/Mips/Mips.h b/lib/Target/Mips/Mips.h
index abcb9c4..0accb4e 100644
--- a/lib/Target/Mips/Mips.h
+++ b/lib/Target/Mips/Mips.h
@@ -15,6 +15,8 @@
#ifndef TARGET_MIPS_H
#define TARGET_MIPS_H
+#include "llvm/Target/TargetMachine.h"
+
namespace llvm {
class MipsTargetMachine;
class FunctionPass;
@@ -25,7 +27,8 @@
FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM);
FunctionPass *createMipsCodePrinterPass(raw_ostream &OS,
MipsTargetMachine &TM,
- unsigned OptLevel, bool Verbose);
+ CodeGenOpt::Level OptLevel,
+ bool Verbose);
} // end namespace llvm;
// Defines symbolic names for Mips registers. This defines a mapping from
diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp
index 69a480d..ef524e3 100644
--- a/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/lib/Target/Mips/MipsTargetMachine.cpp
@@ -105,7 +105,7 @@
// Install an instruction selector pass using
// the ISelDag to gen Mips code.
bool MipsTargetMachine::
-addInstSelector(PassManagerBase &PM, unsigned OptLevel)
+addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel)
{
PM.add(createMipsISelDag(*this));
return false;
@@ -115,7 +115,7 @@
// machine code is emitted. return true if -print-machineinstrs should
// print out the code after the passes.
bool MipsTargetMachine::
-addPreEmitPass(PassManagerBase &PM, unsigned OptLevel)
+addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel)
{
PM.add(createMipsDelaySlotFillerPass(*this));
return true;
@@ -124,7 +124,7 @@
// Implements the AssemblyEmitter for the target. Must return
// true if AssemblyEmitter is supported
bool MipsTargetMachine::
-addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel,
+addAssemblyEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
bool Verbose, raw_ostream &Out)
{
// Output assembly language.
diff --git a/lib/Target/Mips/MipsTargetMachine.h b/lib/Target/Mips/MipsTargetMachine.h
index b5dc058..a9e1df2 100644
--- a/lib/Target/Mips/MipsTargetMachine.h
+++ b/lib/Target/Mips/MipsTargetMachine.h
@@ -57,9 +57,12 @@
static unsigned getModuleMatchQuality(const Module &M);
// Pass Pipeline Configuration
- virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel);
- virtual bool addPreEmitPass(PassManagerBase &PM, unsigned OptLevel);
- virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel,
+ virtual bool addInstSelector(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel);
+ virtual bool addPreEmitPass(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel);
+ virtual bool addAssemblyEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
bool Verbose, raw_ostream &Out);
};