Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index 7da43e9..ceac594 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -134,7 +134,7 @@
bool OptForSize;
public:
- explicit X86DAGToDAGISel(X86TargetMachine &tm, unsigned OptLevel)
+ explicit X86DAGToDAGISel(X86TargetMachine &tm, CodeGenOpt::Level OptLevel)
: SelectionDAGISel(tm, OptLevel),
TM(tm), X86Lowering(*TM.getTargetLowering()),
Subtarget(&TM.getSubtarget<X86Subtarget>()),
@@ -306,7 +306,7 @@
bool X86DAGToDAGISel::IsLegalAndProfitableToFold(SDNode *N, SDNode *U,
SDNode *Root) const {
- if (OptLevel == 0) return false;
+ if (OptLevel == CodeGenOpt::None) return false;
if (U == Root)
switch (U->getOpcode()) {
@@ -714,7 +714,7 @@
OptForSize = F->hasFnAttr(Attribute::OptimizeForSize);
DEBUG(BB->dump());
- if (OptLevel != 0)
+ if (OptLevel != CodeGenOpt::None)
PreprocessForRMW();
// FIXME: This should only happen when not compiled with -O0.
@@ -1744,6 +1744,7 @@
/// createX86ISelDag - This pass converts a legalized DAG into a
/// X86-specific DAG, ready for instruction scheduling.
///
-FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM, unsigned OptLevel) {
+FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM,
+ llvm::CodeGenOpt::Level OptLevel) {
return new X86DAGToDAGISel(TM, OptLevel);
}