Temporarily revert r75408. It appears to break the Apple-style builds:

x86_64-apple-darwin10-gcc -c   -g -O2  -DIN_GCC   -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -pedantic -Wno-long-long -Wno-variadic-macros -Wno-overlength-strings -Wold-style-definition -Wmissing-format-attribute   -mdynamic-no-pic -DHAVE_CONFIG_H -I. -I. -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmgcc42.roots/llvmgcc42~obj/src/gcc -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmgcc42.roots/llvmgcc42~obj/src/gcc/. -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmgcc42.roots/llvmgcc42~obj/src/gcc/../include -I./../intl -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmgcc42.roots/llvmgcc42~obj/src/gcc/../libcpp/include  -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmgcc42.roots/llvmgcc42~obj/src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmCore.roots/llvmCore~dst/Developer/usr/local/include -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmCore.roots/llvmCore~obj/src/include -DENABLE_LLVM -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmCore.roots/llvmCore~dst/Developer/usr/local/include  -D_DEBUG  -D_GNU_SOURCE -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -DLLVM_VERSION_INFO='"9999"' -DBUILD_LLVM_APPLE_STYLE   /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmgcc42.roots/llvmgcc42~obj/src/gcc/tree-ssa-alias.c -o tree-ssa-alias.o
/var/tmp//ccJQ2JBT.s:4134:Incorrect register `%rcx' used with `l' suffix
make[2]: *** [tree-ssa-live.o] Error 1
make[2]: *** Waiting for unfinished jobs....



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75412 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 514e80d..572b71d 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -929,7 +929,8 @@
   default: break;
   case X86::MOV8r0:
   case X86::MOV16r0:
-  case X86::MOV32r0: {
+  case X86::MOV32r0:
+  case X86::MOV64r0: {
     if (!isSafeToClobberEFLAGS(MBB, I)) {
       unsigned Opc = 0;
       switch (Orig->getOpcode()) {
@@ -937,6 +938,7 @@
       case X86::MOV8r0:  Opc = X86::MOV8ri;  break;
       case X86::MOV16r0: Opc = X86::MOV16ri; break;
       case X86::MOV32r0: Opc = X86::MOV32ri; break;
+      case X86::MOV64r0: Opc = X86::MOV64ri32; break;
       }
       BuildMI(MBB, I, DL, get(Opc), DestReg).addImm(0);
       Emitted = true;
@@ -2163,6 +2165,8 @@
       NewMI = MakeM0Inst(*this, X86::MOV16mi, MOs, MI);
     else if (MI->getOpcode() == X86::MOV32r0)
       NewMI = MakeM0Inst(*this, X86::MOV32mi, MOs, MI);
+    else if (MI->getOpcode() == X86::MOV64r0)
+      NewMI = MakeM0Inst(*this, X86::MOV64mi32, MOs, MI);
     else if (MI->getOpcode() == X86::MOV8r0)
       NewMI = MakeM0Inst(*this, X86::MOV8mi, MOs, MI);
     if (NewMI)
@@ -2361,9 +2365,10 @@
     OpcodeTablePtr = &RegOp2MemOpTable2Addr;
   } else if (OpNum == 0) { // If operand 0
     switch (Opc) {
-    case X86::MOV8r0:
     case X86::MOV16r0:
     case X86::MOV32r0:
+    case X86::MOV64r0:
+    case X86::MOV8r0:
       return true;
     default: break;
     }