There shalt be only one "immediate" operand type!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28099 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index a0b8d1a..bd23b5a 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -62,8 +62,7 @@
enum MachineOperandType {
MO_VirtualRegister, // virtual register for *value
- MO_SignExtendedImmed,
- MO_UnextendedImmed,
+ MO_Immediate, // Immediate Operand
MO_MachineBasicBlock, // MachineBasicBlock reference
MO_FrameIndex, // Abstract Stack Frame Index
MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
@@ -160,9 +159,7 @@
/// Accessors that tell you what kind of MachineOperand you're looking at.
///
bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
- bool isImmediate() const {
- return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
- }
+ bool isImmediate() const { return opType == MO_Immediate; }
bool isFrameIndex() const { return opType == MO_FrameIndex; }
bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
bool isJumpTableIndex() const { return opType == MO_JumpTableIndex; }
@@ -380,7 +377,7 @@
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
operands.push_back(
- MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
+ MachineOperand(intValue, MachineOperand::MO_Immediate));
}
/// addZeroExtImm64Operand - Add a zero extended 64-bit constant argument
@@ -389,18 +386,7 @@
void addZeroExtImm64Operand(uint64_t intValue) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
- operands.push_back(
- MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
- }
-
- /// addSignExtImmOperand - Add a zero extended constant argument to the
- /// machine instruction.
- ///
- void addSignExtImmOperand(int intValue) {
- assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already done!");
- operands.push_back(
- MachineOperand(intValue, MachineOperand::MO_SignExtendedImmed));
+ operands.push_back(MachineOperand(intValue, MachineOperand::MO_Immediate));
}
void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
diff --git a/include/llvm/CodeGen/MachineInstrBuilder.h b/include/llvm/CodeGen/MachineInstrBuilder.h
index 384cb70..3a25ea2 100644
--- a/include/llvm/CodeGen/MachineInstrBuilder.h
+++ b/include/llvm/CodeGen/MachineInstrBuilder.h
@@ -47,13 +47,6 @@
return *this;
}
- /// addSImm - Add a new sign extended immediate operand...
- ///
- const MachineInstrBuilder &addSImm(int val) const {
- MI->addSignExtImmOperand(val);
- return *this;
- }
-
/// addZImm - Add a new zero extended immediate operand...
///
const MachineInstrBuilder &addZImm(unsigned Val) const {
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index dad1e1f..90cec5a 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -160,10 +160,7 @@
case MachineOperand::MO_VirtualRegister:
OutputReg(OS, MO.getReg(), MRI);
break;
- case MachineOperand::MO_SignExtendedImmed:
- OS << (long)MO.getImmedValue();
- break;
- case MachineOperand::MO_UnextendedImmed:
+ case MachineOperand::MO_Immediate:
OS << (long)MO.getImmedValue();
break;
case MachineOperand::MO_MachineBasicBlock:
@@ -260,10 +257,7 @@
case MachineOperand::MO_VirtualRegister:
OutputReg(OS, MO.getReg());
break;
- case MachineOperand::MO_SignExtendedImmed:
- OS << (long)MO.getImmedValue();
- break;
- case MachineOperand::MO_UnextendedImmed:
+ case MachineOperand::MO_Immediate:
OS << (long)MO.getImmedValue();
break;
case MachineOperand::MO_MachineBasicBlock:
diff --git a/lib/Target/Alpha/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AlphaAsmPrinter.cpp
index 1e36067..e51b784 100644
--- a/lib/Target/Alpha/AlphaAsmPrinter.cpp
+++ b/lib/Target/Alpha/AlphaAsmPrinter.cpp
@@ -97,8 +97,7 @@
O << RI.get(MO.getReg()).Name;
return;
- case MachineOperand::MO_SignExtendedImmed:
- case MachineOperand::MO_UnextendedImmed:
+ case MachineOperand::MO_Immediate:
std::cerr << "printOp() does not handle immediate values\n";
abort();
return;
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp
index 85c9da8..95f60ed 100644
--- a/lib/Target/Alpha/AlphaRegisterInfo.cpp
+++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp
@@ -234,14 +234,14 @@
//inst off the SP/FP
//fix up the old:
MI.SetMachineOperandReg(i + 1, Alpha::R28);
- MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed,
+ MI.SetMachineOperandConst(i, MachineOperand::MO_Immediate,
getLower16(Offset));
//insert the new
MachineInstr* nMI=BuildMI(Alpha::LDAH, 2, Alpha::R28)
.addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
MBB.insert(II, nMI);
} else {
- MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed, Offset);
+ MI.SetMachineOperandConst(i, MachineOperand::MO_Immediate, Offset);
}
}
diff --git a/lib/Target/IA64/IA64AsmPrinter.cpp b/lib/Target/IA64/IA64AsmPrinter.cpp
index 087fcc3..86b8432 100644
--- a/lib/Target/IA64/IA64AsmPrinter.cpp
+++ b/lib/Target/IA64/IA64AsmPrinter.cpp
@@ -170,16 +170,15 @@
}
void IA64AsmPrinter::printOp(const MachineOperand &MO,
- bool isBRCALLinsn /* = false */) {
+ bool isBRCALLinsn /* = false */) {
const MRegisterInfo &RI = *TM.getRegisterInfo();
switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister:
O << RI.get(MO.getReg()).Name;
return;
- case MachineOperand::MO_SignExtendedImmed:
- case MachineOperand::MO_UnextendedImmed:
- O << /*(unsigned int)*/MO.getImmedValue();
+ case MachineOperand::MO_Immediate:
+ O << MO.getImmedValue();
return;
case MachineOperand::MO_MachineBasicBlock:
printBasicBlockLabel(MO.getMachineBasicBlock());
diff --git a/lib/Target/IA64/IA64InstrBuilder.h b/lib/Target/IA64/IA64InstrBuilder.h
index 832fbb9..f9b5004 100644
--- a/lib/Target/IA64/IA64InstrBuilder.h
+++ b/lib/Target/IA64/IA64InstrBuilder.h
@@ -29,9 +29,9 @@
addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
bool mem = true) {
if (mem)
- return MIB.addSImm(Offset).addFrameIndex(FI);
+ return MIB.addImm(Offset).addFrameIndex(FI);
else
- return MIB.addFrameIndex(FI).addSImm(Offset);
+ return MIB.addFrameIndex(FI).addImm(Offset);
}
/// addConstantPoolReference - This function is used to add a reference to the
@@ -43,7 +43,7 @@
inline const MachineInstrBuilder&
addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
int Offset = 0) {
- return MIB.addSImm(Offset).addConstantPoolIndex(CPI);
+ return MIB.addImm(Offset).addConstantPoolIndex(CPI);
}
} // End llvm namespace
diff --git a/lib/Target/IA64/IA64RegisterInfo.cpp b/lib/Target/IA64/IA64RegisterInfo.cpp
index e9a809f..53fec20 100644
--- a/lib/Target/IA64/IA64RegisterInfo.cpp
+++ b/lib/Target/IA64/IA64RegisterInfo.cpp
@@ -122,11 +122,11 @@
MachineInstr *New;
if (Old->getOpcode() == IA64::ADJUSTCALLSTACKDOWN) {
New=BuildMI(IA64::ADDIMM22, 2, IA64::r12).addReg(IA64::r12)
- .addSImm(-Amount);
+ .addImm(-Amount);
} else {
assert(Old->getOpcode() == IA64::ADJUSTCALLSTACKUP);
New=BuildMI(IA64::ADDIMM22, 2, IA64::r12).addReg(IA64::r12)
- .addSImm(Amount);
+ .addImm(Amount);
}
// Replace the pseudo instruction with a new instruction...
@@ -173,7 +173,7 @@
// (the bundler wants to know this)
//insert the new
MachineInstr* nMI=BuildMI(IA64::ADDIMM22, 2, IA64::r22)
- .addReg(BaseRegister).addSImm(Offset);
+ .addReg(BaseRegister).addImm(Offset);
MBB.insert(II, nMI);
} else { // it's big
//fix up the old:
@@ -181,7 +181,7 @@
MI.getOperand(i).setUse(); // mark r22 as being used
// (the bundler wants to know this)
MachineInstr* nMI;
- nMI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addSImm(Offset);
+ nMI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addImm(Offset);
MBB.insert(II, nMI);
nMI=BuildMI(IA64::ADD, 2, IA64::r22).addReg(BaseRegister)
.addReg(IA64::r22);
@@ -272,7 +272,7 @@
MI=BuildMI(IA64::ADDIMM22, 2, IA64::r12).addReg(IA64::r12).addImm(-NumBytes);
MBB.insert(MBBI, MI);
} else { // we use r22 as a scratch register here
- MI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addSImm(-NumBytes);
+ MI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addImm(-NumBytes);
// FIXME: MOVLSI32 expects a _u_32imm
MBB.insert(MBBI, MI); // first load the decrement into r22
MI=BuildMI(IA64::ADD, 2, IA64::r12).addReg(IA64::r12).addReg(IA64::r22);
diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index e85ce9f..5e30fe0 100644
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -356,8 +356,7 @@
O << RI.get(MO.getReg()).Name;
return;
- case MachineOperand::MO_SignExtendedImmed:
- case MachineOperand::MO_UnextendedImmed:
+ case MachineOperand::MO_Immediate:
std::cerr << "printOp() does not handle immediate values\n";
abort();
return;
diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp
index 543c390..657ff6c 100644
--- a/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -131,7 +131,7 @@
if (Displacement >= -32768 && Displacement <= 32767) {
BuildMI(*MBB, MBBJ, Opcode, 2).addReg(CRReg).addMBB(trueMBB);
} else {
- BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addSImm(8);
+ BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(8);
BuildMI(*MBB, MBBJ, PPC::B, 1).addMBB(trueMBB);
}
diff --git a/lib/Target/PowerPC/PPCInstrBuilder.h b/lib/Target/PowerPC/PPCInstrBuilder.h
index b97178f..3861918 100644
--- a/lib/Target/PowerPC/PPCInstrBuilder.h
+++ b/lib/Target/PowerPC/PPCInstrBuilder.h
@@ -33,9 +33,9 @@
addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
bool mem = true) {
if (mem)
- return MIB.addSImm(Offset).addFrameIndex(FI);
+ return MIB.addImm(Offset).addFrameIndex(FI);
else
- return MIB.addFrameIndex(FI).addSImm(Offset);
+ return MIB.addFrameIndex(FI).addImm(Offset);
}
/// addConstantPoolReference - This function is used to add a reference to the
@@ -47,7 +47,7 @@
inline const MachineInstrBuilder&
addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
int Offset = 0) {
- return MIB.addSImm(Offset).addConstantPoolIndex(CPI);
+ return MIB.addImm(Offset).addConstantPoolIndex(CPI);
}
} // End llvm namespace
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 1f95f49..24da5a3 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -269,10 +269,10 @@
// Replace the pseudo instruction with a new instruction...
if (Old->getOpcode() == PPC::ADJCALLSTACKDOWN) {
- BuildMI(MBB, I, PPC::ADDI, 2, PPC::R1).addReg(PPC::R1).addSImm(-Amount);
+ BuildMI(MBB, I, PPC::ADDI, 2, PPC::R1).addReg(PPC::R1).addImm(-Amount);
} else {
assert(Old->getOpcode() == PPC::ADJCALLSTACKUP);
- BuildMI(MBB, I, PPC::ADDI, 2, PPC::R1).addReg(PPC::R1).addSImm(Amount);
+ BuildMI(MBB, I, PPC::ADDI, 2, PPC::R1).addReg(PPC::R1).addImm(Amount);
}
}
}
@@ -311,7 +311,7 @@
if (Offset > 32767 || Offset < -32768) {
// Insert a set of r0 with the full offset value before the ld, st, or add
MachineBasicBlock *MBB = MI.getParent();
- BuildMI(*MBB, II, PPC::LIS, 1, PPC::R0).addSImm(Offset >> 16);
+ BuildMI(*MBB, II, PPC::LIS, 1, PPC::R0).addImm(Offset >> 16);
BuildMI(*MBB, II, PPC::ORI, 2, PPC::R0).addReg(PPC::R0).addImm(Offset);
// convert into indexed form of the instruction
@@ -333,8 +333,7 @@
Offset >>= 2; // The actual encoded value has the low two bits zero.
break;
}
- MI.SetMachineOperandConst(OffIdx, MachineOperand::MO_SignExtendedImmed,
- Offset);
+ MI.SetMachineOperandConst(OffIdx, MachineOperand::MO_Immediate, Offset);
}
}
@@ -511,14 +510,14 @@
BuildMI(MBB, MBBI, PPC::RLWINM, 4, PPC::R0)
.addReg(PPC::R1).addImm(0).addImm(32-Log2_32(MaxAlign)).addImm(31);
BuildMI(MBB, MBBI, PPC::SUBFIC,2,PPC::R0).addReg(PPC::R0)
- .addSImm(MaxAlign-NumBytes);
+ .addImm(MaxAlign-NumBytes);
BuildMI(MBB, MBBI, PPC::STWUX, 3)
.addReg(PPC::R1).addReg(PPC::R1).addReg(PPC::R0);
} else if (NumBytes <= 32768) {
- BuildMI(MBB, MBBI, PPC::STWU, 3).addReg(PPC::R1).addSImm(NegNumbytes)
+ BuildMI(MBB, MBBI, PPC::STWU, 3).addReg(PPC::R1).addImm(NegNumbytes)
.addReg(PPC::R1);
} else {
- BuildMI(MBB, MBBI, PPC::LIS, 1, PPC::R0).addSImm(NegNumbytes >> 16);
+ BuildMI(MBB, MBBI, PPC::LIS, 1, PPC::R0).addImm(NegNumbytes >> 16);
BuildMI(MBB, MBBI, PPC::ORI, 2, PPC::R0).addReg(PPC::R0)
.addImm(NegNumbytes & 0xFFFF);
BuildMI(MBB, MBBI, PPC::STWUX, 3).addReg(PPC::R1).addReg(PPC::R1)
@@ -534,13 +533,13 @@
MachineLocation Src(MachineLocation::VirtualFP, NegNumbytes);
Moves.push_back(new MachineMove(LabelID, Dst, Src));
- BuildMI(MBB, MBBI, PPC::DWARF_LABEL, 1).addSImm(LabelID);
+ BuildMI(MBB, MBBI, PPC::DWARF_LABEL, 1).addImm(LabelID);
}
// If there is a frame pointer, copy R1 (SP) into R31 (FP)
if (HasFP) {
BuildMI(MBB, MBBI, PPC::STW, 3)
- .addReg(PPC::R31).addSImm(GPRSize).addReg(PPC::R1);
+ .addReg(PPC::R31).addImm(GPRSize).addReg(PPC::R1);
BuildMI(MBB, MBBI, PPC::OR4, 2, PPC::R31).addReg(PPC::R1).addReg(PPC::R1);
}
}
@@ -564,16 +563,16 @@
// its stack slot.
if (hasFP(MF)) {
BuildMI(MBB, MBBI, PPC::LWZ, 2, PPC::R31)
- .addSImm(GPRSize).addReg(PPC::R31);
+ .addImm(GPRSize).addReg(PPC::R31);
}
// The loaded (or persistent) stack pointer value is offseted by the 'stwu'
// on entry to the function. Add this offset back now.
if (NumBytes < 32768 && TargetAlign >= MFI->getMaxAlignment()) {
BuildMI(MBB, MBBI, PPC::ADDI, 2, PPC::R1)
- .addReg(PPC::R1).addSImm(NumBytes);
+ .addReg(PPC::R1).addImm(NumBytes);
} else {
- BuildMI(MBB, MBBI, PPC::LWZ, 2, PPC::R1).addSImm(0).addReg(PPC::R1);
+ BuildMI(MBB, MBBI, PPC::LWZ, 2, PPC::R1).addImm(0).addReg(PPC::R1);
}
}
}
diff --git a/lib/Target/Sparc/SparcAsmPrinter.cpp b/lib/Target/Sparc/SparcAsmPrinter.cpp
index 2d81bbd..d95ca9c 100644
--- a/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -153,8 +153,7 @@
O << "%reg" << MO.getReg();
break;
- case MachineOperand::MO_SignExtendedImmed:
- case MachineOperand::MO_UnextendedImmed:
+ case MachineOperand::MO_Immediate:
O << (int)MO.getImmedValue();
break;
case MachineOperand::MO_MachineBasicBlock:
@@ -192,8 +191,7 @@
if (OpTy == MachineOperand::MO_VirtualRegister &&
MI->getOperand(opNum+1).getReg() == SP::G0)
return; // don't print "+%g0"
- if ((OpTy == MachineOperand::MO_SignExtendedImmed ||
- OpTy == MachineOperand::MO_UnextendedImmed) &&
+ if (OpTy == MachineOperand::MO_Immediate &&
MI->getOperand(opNum+1).getImmedValue() == 0)
return; // don't print "+0"
diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp
index 75c3378..d72ca74 100644
--- a/lib/Target/Sparc/SparcRegisterInfo.cpp
+++ b/lib/Target/Sparc/SparcRegisterInfo.cpp
@@ -111,7 +111,7 @@
if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
Size = -Size;
if (Size)
- BuildMI(MBB, I, SP::ADDri, 2, SP::O6).addReg(SP::O6).addSImm(Size);
+ BuildMI(MBB, I, SP::ADDri, 2, SP::O6).addReg(SP::O6).addImm(Size);
MBB.erase(I);
}
@@ -136,7 +136,7 @@
// If the offset is small enough to fit in the immediate field, directly
// encode it.
MI.SetMachineOperandReg(i, SP::I6);
- MI.SetMachineOperandConst(i+1, MachineOperand::MO_SignExtendedImmed,Offset);
+ MI.SetMachineOperandConst(i+1, MachineOperand::MO_Immediate, Offset);
} else {
// Otherwise, emit a G1 = SETHI %hi(offset). FIXME: it would be better to
// scavenge a register here instead of reserving G1 all of the time.
@@ -147,7 +147,7 @@
SP::G1).addReg(SP::G1).addReg(SP::I6);
// Insert: G1+%lo(offset) into the user.
MI.SetMachineOperandReg(i, SP::G1);
- MI.SetMachineOperandConst(i+1, MachineOperand::MO_SignExtendedImmed,
+ MI.SetMachineOperandConst(i+1, MachineOperand::MO_Immediate,
Offset & ((1 << 10)-1));
}
}
diff --git a/lib/Target/X86/X86ATTAsmPrinter.cpp b/lib/Target/X86/X86ATTAsmPrinter.cpp
index 5283ddd..122b012 100755
--- a/lib/Target/X86/X86ATTAsmPrinter.cpp
+++ b/lib/Target/X86/X86ATTAsmPrinter.cpp
@@ -116,8 +116,7 @@
O << (char)tolower(*Name);
return;
- case MachineOperand::MO_SignExtendedImmed:
- case MachineOperand::MO_UnextendedImmed:
+ case MachineOperand::MO_Immediate:
if (!Modifier || strcmp(Modifier, "debug") != 0)
O << '$';
O << (int)MO.getImmedValue();
diff --git a/lib/Target/X86/X86InstrBuilder.h b/lib/Target/X86/X86InstrBuilder.h
index 6a3c116..91a1069 100644
--- a/lib/Target/X86/X86InstrBuilder.h
+++ b/lib/Target/X86/X86InstrBuilder.h
@@ -61,7 +61,7 @@
unsigned Reg) {
// Because memory references are always represented with four
// values, this adds: Reg, [1, NoReg, 0] to the instruction.
- return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(0);
+ return MIB.addReg(Reg).addZImm(1).addReg(0).addImm(0);
}
@@ -71,14 +71,14 @@
///
inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
unsigned Reg, int Offset) {
- return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(Offset);
+ return MIB.addReg(Reg).addZImm(1).addReg(0).addImm(Offset);
}
/// addRegReg - This function is used to add a memory reference of the form:
/// [Reg + Reg].
inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB,
unsigned Reg1, unsigned Reg2) {
- return MIB.addReg(Reg1).addZImm(1).addReg(Reg2).addSImm(0);
+ return MIB.addReg(Reg1).addZImm(1).addReg(Reg2).addImm(0);
}
inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
@@ -95,7 +95,7 @@
if (AM.GV)
return MIB.addGlobalAddress(AM.GV, AM.Disp);
else
- return MIB.addSImm(AM.Disp);
+ return MIB.addImm(AM.Disp);
}
/// addFrameReference - This function is used to add a reference to the base of
@@ -105,7 +105,7 @@
///
inline const MachineInstrBuilder &
addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
- return MIB.addFrameIndex(FI).addZImm(1).addReg(0).addSImm(Offset);
+ return MIB.addFrameIndex(FI).addZImm(1).addReg(0).addImm(Offset);
}
/// addConstantPoolReference - This function is used to add a reference to the
@@ -117,7 +117,7 @@
inline const MachineInstrBuilder &
addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
int Offset = 0) {
- return MIB.addConstantPoolIndex(CPI).addZImm(1).addReg(0).addSImm(Offset);
+ return MIB.addConstantPoolIndex(CPI).addZImm(1).addReg(0).addImm(Offset);
}
} // End llvm namespace
diff --git a/lib/Target/X86/X86IntelAsmPrinter.cpp b/lib/Target/X86/X86IntelAsmPrinter.cpp
index 0c6c6b4..07dab8a 100755
--- a/lib/Target/X86/X86IntelAsmPrinter.cpp
+++ b/lib/Target/X86/X86IntelAsmPrinter.cpp
@@ -107,8 +107,7 @@
O << "reg" << MO.getReg();
return;
- case MachineOperand::MO_SignExtendedImmed:
- case MachineOperand::MO_UnextendedImmed:
+ case MachineOperand::MO_Immediate:
O << (int)MO.getImmedValue();
return;
case MachineOperand::MO_MachineBasicBlock:
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index a9e345f..9f4a561 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -676,7 +676,7 @@
else
Offset += 4; // Skip the saved EBP
- MI.SetMachineOperandConst(i+3, MachineOperand::MO_SignExtendedImmed, Offset);
+ MI.SetMachineOperandConst(i+3, MachineOperand::MO_Immediate, Offset);
}
void