There shalt be only one "immediate" operand type!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28099 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index e85ce9f..5e30fe0 100644
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -356,8 +356,7 @@
O << RI.get(MO.getReg()).Name;
return;
- case MachineOperand::MO_SignExtendedImmed:
- case MachineOperand::MO_UnextendedImmed:
+ case MachineOperand::MO_Immediate:
std::cerr << "printOp() does not handle immediate values\n";
abort();
return;
diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp
index 543c390..657ff6c 100644
--- a/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -131,7 +131,7 @@
if (Displacement >= -32768 && Displacement <= 32767) {
BuildMI(*MBB, MBBJ, Opcode, 2).addReg(CRReg).addMBB(trueMBB);
} else {
- BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addSImm(8);
+ BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(8);
BuildMI(*MBB, MBBJ, PPC::B, 1).addMBB(trueMBB);
}
diff --git a/lib/Target/PowerPC/PPCInstrBuilder.h b/lib/Target/PowerPC/PPCInstrBuilder.h
index b97178f..3861918 100644
--- a/lib/Target/PowerPC/PPCInstrBuilder.h
+++ b/lib/Target/PowerPC/PPCInstrBuilder.h
@@ -33,9 +33,9 @@
addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
bool mem = true) {
if (mem)
- return MIB.addSImm(Offset).addFrameIndex(FI);
+ return MIB.addImm(Offset).addFrameIndex(FI);
else
- return MIB.addFrameIndex(FI).addSImm(Offset);
+ return MIB.addFrameIndex(FI).addImm(Offset);
}
/// addConstantPoolReference - This function is used to add a reference to the
@@ -47,7 +47,7 @@
inline const MachineInstrBuilder&
addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
int Offset = 0) {
- return MIB.addSImm(Offset).addConstantPoolIndex(CPI);
+ return MIB.addImm(Offset).addConstantPoolIndex(CPI);
}
} // End llvm namespace
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 1f95f49..24da5a3 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -269,10 +269,10 @@
// Replace the pseudo instruction with a new instruction...
if (Old->getOpcode() == PPC::ADJCALLSTACKDOWN) {
- BuildMI(MBB, I, PPC::ADDI, 2, PPC::R1).addReg(PPC::R1).addSImm(-Amount);
+ BuildMI(MBB, I, PPC::ADDI, 2, PPC::R1).addReg(PPC::R1).addImm(-Amount);
} else {
assert(Old->getOpcode() == PPC::ADJCALLSTACKUP);
- BuildMI(MBB, I, PPC::ADDI, 2, PPC::R1).addReg(PPC::R1).addSImm(Amount);
+ BuildMI(MBB, I, PPC::ADDI, 2, PPC::R1).addReg(PPC::R1).addImm(Amount);
}
}
}
@@ -311,7 +311,7 @@
if (Offset > 32767 || Offset < -32768) {
// Insert a set of r0 with the full offset value before the ld, st, or add
MachineBasicBlock *MBB = MI.getParent();
- BuildMI(*MBB, II, PPC::LIS, 1, PPC::R0).addSImm(Offset >> 16);
+ BuildMI(*MBB, II, PPC::LIS, 1, PPC::R0).addImm(Offset >> 16);
BuildMI(*MBB, II, PPC::ORI, 2, PPC::R0).addReg(PPC::R0).addImm(Offset);
// convert into indexed form of the instruction
@@ -333,8 +333,7 @@
Offset >>= 2; // The actual encoded value has the low two bits zero.
break;
}
- MI.SetMachineOperandConst(OffIdx, MachineOperand::MO_SignExtendedImmed,
- Offset);
+ MI.SetMachineOperandConst(OffIdx, MachineOperand::MO_Immediate, Offset);
}
}
@@ -511,14 +510,14 @@
BuildMI(MBB, MBBI, PPC::RLWINM, 4, PPC::R0)
.addReg(PPC::R1).addImm(0).addImm(32-Log2_32(MaxAlign)).addImm(31);
BuildMI(MBB, MBBI, PPC::SUBFIC,2,PPC::R0).addReg(PPC::R0)
- .addSImm(MaxAlign-NumBytes);
+ .addImm(MaxAlign-NumBytes);
BuildMI(MBB, MBBI, PPC::STWUX, 3)
.addReg(PPC::R1).addReg(PPC::R1).addReg(PPC::R0);
} else if (NumBytes <= 32768) {
- BuildMI(MBB, MBBI, PPC::STWU, 3).addReg(PPC::R1).addSImm(NegNumbytes)
+ BuildMI(MBB, MBBI, PPC::STWU, 3).addReg(PPC::R1).addImm(NegNumbytes)
.addReg(PPC::R1);
} else {
- BuildMI(MBB, MBBI, PPC::LIS, 1, PPC::R0).addSImm(NegNumbytes >> 16);
+ BuildMI(MBB, MBBI, PPC::LIS, 1, PPC::R0).addImm(NegNumbytes >> 16);
BuildMI(MBB, MBBI, PPC::ORI, 2, PPC::R0).addReg(PPC::R0)
.addImm(NegNumbytes & 0xFFFF);
BuildMI(MBB, MBBI, PPC::STWUX, 3).addReg(PPC::R1).addReg(PPC::R1)
@@ -534,13 +533,13 @@
MachineLocation Src(MachineLocation::VirtualFP, NegNumbytes);
Moves.push_back(new MachineMove(LabelID, Dst, Src));
- BuildMI(MBB, MBBI, PPC::DWARF_LABEL, 1).addSImm(LabelID);
+ BuildMI(MBB, MBBI, PPC::DWARF_LABEL, 1).addImm(LabelID);
}
// If there is a frame pointer, copy R1 (SP) into R31 (FP)
if (HasFP) {
BuildMI(MBB, MBBI, PPC::STW, 3)
- .addReg(PPC::R31).addSImm(GPRSize).addReg(PPC::R1);
+ .addReg(PPC::R31).addImm(GPRSize).addReg(PPC::R1);
BuildMI(MBB, MBBI, PPC::OR4, 2, PPC::R31).addReg(PPC::R1).addReg(PPC::R1);
}
}
@@ -564,16 +563,16 @@
// its stack slot.
if (hasFP(MF)) {
BuildMI(MBB, MBBI, PPC::LWZ, 2, PPC::R31)
- .addSImm(GPRSize).addReg(PPC::R31);
+ .addImm(GPRSize).addReg(PPC::R31);
}
// The loaded (or persistent) stack pointer value is offseted by the 'stwu'
// on entry to the function. Add this offset back now.
if (NumBytes < 32768 && TargetAlign >= MFI->getMaxAlignment()) {
BuildMI(MBB, MBBI, PPC::ADDI, 2, PPC::R1)
- .addReg(PPC::R1).addSImm(NumBytes);
+ .addReg(PPC::R1).addImm(NumBytes);
} else {
- BuildMI(MBB, MBBI, PPC::LWZ, 2, PPC::R1).addSImm(0).addReg(PPC::R1);
+ BuildMI(MBB, MBBI, PPC::LWZ, 2, PPC::R1).addImm(0).addReg(PPC::R1);
}
}
}