commit 64ac91b4b6e62f82d608fe9602b28c00171f88a0
author Chad Rosier <mcrosier@apple.com> Wed Dec 14 17:32:02 2011 +0000
committer Chad Rosier <mcrosier@apple.com> Wed Dec 14 17:32:02 2011 +0000
tree a844e36aea9c2aa25d46c8269c405ed99dffdbd5
parent 8d11c6349f9bf276534907245946518042c1bb60

Tidy up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146568 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMFastISel.cpp

diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp
index bfeac47..df973a7 100644
--- a/lib/Target/ARM/ARMFastISel.cpp
+++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -1130,7 +1130,6 @@
       break;
     case MVT::f32:
       if (!Subtarget->hasVFP2()) return false;
-      StrOpc = ARM::VSTRS;
       // Unaligned stores need special handling. Floats require word-alignment.
       if (Alignment && Alignment < 4) {
         unsigned MoveReg = createResultReg(TLI.getRegClassFor(MVT::i32));
@@ -1140,6 +1139,8 @@
         SrcReg = MoveReg;
         VT = MVT::i32;
         StrOpc = isThumb2 ? ARM::t2STRi12 : ARM::STRi12;
+      } else {
+        StrOpc = ARM::VSTRS;
       }
       break;
     case MVT::f64: