Add SSA verification to MachineVerifier.
Somehow we never verified SSA dominance before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152458 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp
index f26886f..91a536d 100644
--- a/lib/CodeGen/MachineVerifier.cpp
+++ b/lib/CodeGen/MachineVerifier.cpp
@@ -1014,8 +1014,18 @@
}
// Now check liveness info if available
- if (LiveVars || LiveInts)
- calcRegsRequired();
+ calcRegsRequired();
+
+ if (MRI->isSSA() && !MF->empty()) {
+ BBInfo &MInfo = MBBInfoMap[&MF->front()];
+ for (RegSet::iterator
+ I = MInfo.vregsRequired.begin(), E = MInfo.vregsRequired.end(); I != E;
+ ++I) {
+ report("Virtual register def doesn't dominate all uses.", MF);
+ *OS << "- register:\t" << PrintReg(*I) << '\n';
+ }
+ }
+
if (LiveVars)
verifyLiveVariables();
if (LiveInts)