Expand pseudos/macros:
SltCCRxRy16, SltiCCRxImmX16, SltiuCCRxImmX16, SltuCCRxRy16
$T8 shows up as register $24 when emitted from C++ code so we had
to change some tests that were already there for this functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175593 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Mips/Mips16InstrInfo.cpp b/lib/Target/Mips/Mips16InstrInfo.cpp
index 22cb963..eacc8fc 100644
--- a/lib/Target/Mips/Mips16InstrInfo.cpp
+++ b/lib/Target/Mips/Mips16InstrInfo.cpp
@@ -184,6 +184,18 @@
case Mips::RetRA16:
ExpandRetRA16(MBB, MI, Mips::JrcRa16);
break;
+ case Mips::SltCCRxRy16:
+ ExpandFEXT_CCRX16_ins(MBB, MI, Mips::SltRxRy16);
+ break;
+ case Mips::SltiCCRxImmX16:
+ ExpandFEXT_CCRXI16_ins(MBB, MI, Mips::SltiRxImm16, Mips::SltiRxImmX16);
+ break;
+ case Mips::SltiuCCRxImmX16:
+ ExpandFEXT_CCRXI16_ins(MBB, MI, Mips::SltiuRxImm16, Mips::SltiuRxImmX16);
+ break;
+ case Mips::SltuCCRxRy16:
+ ExpandFEXT_CCRX16_ins(MBB, MI, Mips::SltuRxRy16);
+ break;
}
MBB.erase(MI);
@@ -474,6 +486,30 @@
BuildMI(MBB, I, I->getDebugLoc(), get(BtOpc)).addMBB(target);
}
+void Mips16InstrInfo::ExpandFEXT_CCRX16_ins(
+ MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
+ unsigned SltOpc) const {
+ unsigned CC = I->getOperand(0).getReg();
+ unsigned regX = I->getOperand(1).getReg();
+ unsigned regY = I->getOperand(2).getReg();
+ BuildMI(MBB, I, I->getDebugLoc(), get(SltOpc)).addReg(regX).addReg(regY);
+ BuildMI(MBB, I, I->getDebugLoc(),
+ get(Mips::MoveR3216), CC).addReg(Mips::T8);
+
+}
+void Mips16InstrInfo::ExpandFEXT_CCRXI16_ins(
+ MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
+ unsigned SltiOpc, unsigned SltiXOpc) const {
+ unsigned CC = I->getOperand(0).getReg();
+ unsigned regX = I->getOperand(1).getReg();
+ int64_t Imm = I->getOperand(2).getImm();
+ unsigned SltOpc = whichOp8u_or_16simm(SltiOpc, SltiXOpc, Imm);
+ BuildMI(MBB, I, I->getDebugLoc(), get(SltOpc)).addReg(regX).addImm(Imm);
+ BuildMI(MBB, I, I->getDebugLoc(),
+ get(Mips::MoveR3216), CC).addReg(Mips::T8);
+
+}
+
const MCInstrDesc &Mips16InstrInfo::AddiuSpImm(int64_t Imm) const {
if (validSpImm8(Imm))
return get(Mips::AddiuSpImm16);
@@ -487,6 +523,26 @@
BuildMI(MBB, I, DL, AddiuSpImm(Imm)).addImm(Imm);
}
+unsigned Mips16InstrInfo::whichOp8_or_16uimm
+ (unsigned shortOp, unsigned longOp, int64_t Imm) {
+ if (isUInt<8>(Imm))
+ return shortOp;
+ else if (isUInt<16>(Imm))
+ return longOp;
+ else
+ llvm_unreachable("immediate field not usable");
+}
+
+unsigned Mips16InstrInfo::whichOp8u_or_16simm
+ (unsigned shortOp, unsigned longOp, int64_t Imm) {
+ if (isUInt<8>(Imm))
+ return shortOp;
+ else if (isInt<16>(Imm))
+ return longOp;
+ else
+ llvm_unreachable("immediate field not usable");
+}
+
const MipsInstrInfo *llvm::createMips16InstrInfo(MipsTargetMachine &TM) {
return new Mips16InstrInfo(TM);
}