commit 65da9f1ce14800c137fcd8c32f3ad12c9bebd9bf
author Jim Grosbach <grosbach@apple.com> Sat Mar 02 20:16:19 2013 +0000
committer Jim Grosbach <grosbach@apple.com> Sat Mar 02 20:16:19 2013 +0000
tree 2c6dcf238c6df0d804cfd9c8b19fd99b66334a60
parent 7ccf46395e02ecaff6e6cab6ad258c69893efd55

Clean up code format a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176412 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMISelLowering.cpp

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 0f55e3a..5d24e92 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -4468,12 +4468,10 @@
                  DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, DAG.getUNDEF(VT),
                         Value, DAG.getConstant(index, MVT::i32)),
                            DAG.getConstant(index, MVT::i32));
-        } else {
+        } else
           N = DAG.getNode(ARMISD::VDUPLANE, dl, VT,
                         Value->getOperand(0), Value->getOperand(1));
-        }
-      }
-      else
+      } else
         N = DAG.getNode(ARMISD::VDUP, dl, VT, Value);
 
       if (!usesOnlyOneValue) {