Teach ARM/MC/ELF to handle R_ARM_JUMP24 relocation type for conditional jumps.
(yes, this is different from R_ARM_CALL)

- Adds a new method getARMBranchTargetOpValue() which handles the
  necessary distinction between the conditional and unconditional br/bl
  needed for ARM/ELF

At least for ARM mode, the needed fixup for conditional versus unconditional
br/bl is identical, but the ARM docs and existing ARM tools expect this
reloc type...

Added a few FIXME's for future naming fixups in ARMInstrInfo.td




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124895 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/MC/ELFObjectWriter.cpp b/lib/MC/ELFObjectWriter.cpp
index 4dbb538..629d746 100644
--- a/lib/MC/ELFObjectWriter.cpp
+++ b/lib/MC/ELFObjectWriter.cpp
@@ -1503,7 +1503,7 @@
         break;
       }
       break;
-    case ARM::fixup_arm_branch:
+    case ARM::fixup_arm_uncondbranch:
       switch (Modifier) {
       case MCSymbolRefExpr::VK_ARM_PLT:
         Type = ELF::R_ARM_PLT32;
@@ -1513,6 +1513,9 @@
         break;
       }
       break;
+    case ARM::fixup_arm_condbranch:
+      Type = ELF::R_ARM_JUMP24;
+      break;
     case ARM::fixup_arm_movt_hi16:
     case ARM::fixup_arm_movt_hi16_pcrel:
       Type = ELF::R_ARM_MOVT_PREL;
@@ -1565,11 +1568,12 @@
     case ARM::fixup_arm_thumb_br:
       assert(0 && "Unimplemented");
       break;
-    case ARM::fixup_arm_branch:
-      // FIXME: Differentiate between R_ARM_CALL and
-      // R_ARM_JUMP24 (latter used for conditional jumps)
+    case ARM::fixup_arm_uncondbranch:
       Type = ELF::R_ARM_CALL;
       break;
+    case ARM::fixup_arm_condbranch:
+      Type = ELF::R_ARM_JUMP24;
+      break;
     case ARM::fixup_arm_movt_hi16:
       Type = ELF::R_ARM_MOVT_ABS;
       break;
diff --git a/lib/MC/MachObjectWriter.cpp b/lib/MC/MachObjectWriter.cpp
index 1fb0f99..8af07c7 100644
--- a/lib/MC/MachObjectWriter.cpp
+++ b/lib/MC/MachObjectWriter.cpp
@@ -940,7 +940,8 @@
     case ARM::fixup_arm_ldst_pcrel_12:
     case ARM::fixup_arm_pcrel_10:
     case ARM::fixup_arm_adr_pcrel_12:
-    case ARM::fixup_arm_branch:
+    case ARM::fixup_arm_condbranch:
+    case ARM::fixup_arm_uncondbranch:
       RelocType = unsigned(macho::RIT_ARM_Branch24Bit);
       // Report as 'long', even though that is not quite accurate.
       Log2Size = llvm::Log2_32(4);