With SSE2, expand FCOPYSIGN to a series of SSE bitwise operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32900 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index 26c8f33..0b7a54d 100644
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -35,10 +35,20 @@
/// to X86::ANDPS or X86::ANDPD.
FAND,
+ /// FOR - Bitwise logical OR of floating point values. This corresponds
+ /// to X86::ORPS or X86::ORPD.
+ FOR,
+
/// FXOR - Bitwise logical XOR of floating point values. This corresponds
/// to X86::XORPS or X86::XORPD.
FXOR,
+ /// FSHL, FSRL - Shift a floating point value (in SSE register) by n bits
+ /// while shifting in 0's. These corresponds to X86::PSLLDQ or
+ /// X86::PSRLDQ.
+ FSHL,
+ FSRL,
+
/// FILD, FILD_FLAG - This instruction implements SINT_TO_FP with the
/// integer source in memory and FP reg result. This corresponds to the
/// X86::FILD*m instructions. It has three inputs (token chain, address,
@@ -389,6 +399,7 @@
SDOperand LowerFP_TO_SINT(SDOperand Op, SelectionDAG &DAG);
SDOperand LowerFABS(SDOperand Op, SelectionDAG &DAG);
SDOperand LowerFNEG(SDOperand Op, SelectionDAG &DAG);
+ SDOperand LowerFCOPYSIGN(SDOperand Op, SelectionDAG &DAG);
SDOperand LowerSETCC(SDOperand Op, SelectionDAG &DAG, SDOperand Chain);
SDOperand LowerSELECT(SDOperand Op, SelectionDAG &DAG);
SDOperand LowerBRCOND(SDOperand Op, SelectionDAG &DAG);