Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45674 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index 4ab2938..967e292 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -537,7 +537,7 @@
/// over.
static void UpdateKills(MachineInstr &MI, BitVector &RegKills,
std::vector<MachineOperand*> &KillOps) {
- const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
+ const TargetInstrDescriptor *TID = MI.getDesc();
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI.getOperand(i);
if (!MO.isRegister() || !MO.isUse())
@@ -966,7 +966,7 @@
NextMII = next(MII);
MachineInstr &MI = *MII;
- const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
+ const TargetInstrDescriptor *TID = MI.getDesc();
// Insert restores here if asked to.
if (VRM.isRestorePt(&MI)) {
@@ -1436,7 +1436,7 @@
// If this def is part of a two-address operand, make sure to execute
// the store from the correct physical register.
unsigned PhysReg;
- int TiedOp = MI.getInstrDescriptor()->findTiedToSrcOperand(i);
+ int TiedOp = MI.getDesc()->findTiedToSrcOperand(i);
if (TiedOp != -1) {
PhysReg = MI.getOperand(TiedOp).getReg();
if (SubIdx) {